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[Qemu-devel] [PATCH 06/32] target-arm: Add register_cp_regs_for_features
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 06/32] target-arm: Add register_cp_regs_for_features() |
Date: |
Sun, 15 Apr 2012 14:45:59 +0100 |
Add new function register_cp_regs_for_features() as a place to
register coprocessor registers dependent on feature flags.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu-qom.h | 1 +
target-arm/cpu.c | 2 ++
target-arm/helper.c | 11 +++++++++++
3 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 4abfa90..f8f1e7a 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -105,5 +105,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
void arm_cpu_realize(ARMCPU *cpu);
+void register_cp_regs_for_features(ARMCPU *cpu);
#endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index ae55cd0..eca686c 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -210,6 +210,8 @@ void arm_cpu_realize(ARMCPU *cpu)
if (arm_feature(env, ARM_FEATURE_VFP3)) {
set_feature(env, ARM_FEATURE_VFP);
}
+
+ register_cp_regs_for_features(cpu);
}
/* CPU models */
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 60473fc..325fbab 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -61,6 +61,17 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf,
int reg)
return 0;
}
+void register_cp_regs_for_features(ARMCPU *cpu)
+{
+ /* Register all the coprocessor registers based on feature bits */
+ CPUARMState *env = &cpu->env;
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ /* M profile has no coprocessor registers */
+ return;
+ }
+
+}
+
CPUARMState *cpu_arm_init(const char *cpu_model)
{
ARMCPU *cpu;
--
1.7.1
- [Qemu-devel] [PATCH 00/32] target-arm: refactor copro register implementation, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 06/32] target-arm: Add register_cp_regs_for_features(),
Peter Maydell <=
- [Qemu-devel] [PATCH 10/32] target-arm: Convert TLS registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 01/32] target-arm: initial coprocessor register framework, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 27/32] target-arm: Convert MPIDR, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 25/32] target-arm: Convert cp15 crn=0 crm={1, 2} feature registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 26/32] target-arm: Convert cp15 cache ID registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 22/32] target-arm: Convert cp15 crn=6 registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 19/32] target-arm: Convert cp15 MMU TLB control, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 21/32] target-arm: convert cp15 crn=7 registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 17/32] target-arm: Convert cp15 crn=10 registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 24/32] target-arm: Convert cp15 crn=1 registers, Peter Maydell, 2012/04/15