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Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank
From: |
Grant Likely |
Subject: |
Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank |
Date: |
Fri, 20 Jan 2012 11:27:25 -0700 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Fri, Jan 20, 2012 at 01:57:29PM +0000, Peter Maydell wrote:
> On 20 January 2012 13:48, Rob Herring <address@hidden> wrote:
> > Kernel DT co-maintainer is not authoritative enough for you?
>
> Only if I recognise their name :-) [ie, sorry.]
>
> > The documentation needs some clarification.
> >
> >> But this is an ABI between boot loaders and the kernel so I don't
> >> want to just have something random that happens to work. (And in
> >> particular if -1 is the officially sanctioned number then we need
> >> to fix arm_boot to be able to pass values >16 bits wide.)
> >>
> >
> > Here's were the kernel sets the mach #. nr is from the database for
> > non-DT and ~0 for DT machines.
> >
> > #define MACHINE_START(_type,_name) \
> > static const struct machine_desc __mach_desc_##_type \
> > __used \
> > __attribute__((__section__(".arch.info.init"))) = { \
> > .nr = MACH_TYPE_##_type, \
> > .name = _name,
> >
> > #define MACHINE_END \
> > };
> >
> > #define DT_MACHINE_START(_name, _namestr) \
> > static const struct machine_desc __mach_desc_##_name \
> > __used \
> > __attribute__((__section__(".arch.info.init"))) = { \
> > .nr = ~0, \
> > .name = _namestr,
> >
> > In any case, the kernel ignores the value passed in if a valid dtb is
> > passed in.
>
> I wonder if we should be passing in anything-except-minus-1,
> since if you pass -1 and no DT then the kernel will fail
> silently, whereas if you pass something else and no DT the
> kernel will complain about the mismatch.
Alternately, we can make the kernel always complain about machine type
~0, which is probably safer anyway.
g.
- [Qemu-devel] [PATCH v12 2/4] ahci: add support for non-PCI based controllers, (continued)
- [Qemu-devel] [PATCH v12 2/4] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v12 1/4] Add xgmac ethernet model, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v12 3/4] arm: add secondary cpu boot callbacks to arm_boot.c, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Rob Herring, 2012/01/19
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, John Williams, 2012/01/19
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Rob Herring, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank,
Grant Likely <=
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/20
- [Qemu-devel] Adding -dtb option to qemu, Grant Likely, 2012/01/23
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/20
- Re: [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank, Grant Likely, 2012/01/21