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Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank |
Date: |
Wed, 18 Jan 2012 19:33:45 +0000 |
On 18 January 2012 19:26, Peter Maydell <address@hidden> wrote:
> On 18 January 2012 19:06, Mark Langsdorf <address@hidden> wrote:
>> How would multiple polling supposed to work?
>
> You need several separate bits of code, to put each secondary
> core in a different loop polling a different address.
Er, or more sensibly, just one bit of code that does something like:
/* find out which core we are by reading cp15 MPIDR */
core = cp15_MPIDR & 0x3;
do {
/* now we can check the right flag for this core */
wfi
poll [0x40+0x10 * core]
} while (it's zero);
jump to it;
(translation into assembly left as exercise for the reader)
> (If you have access to your own bootloader sources you should
> be able to see how it does it :-))
This advice is still good :-)
-- PMM
- [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, (continued)
- [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/17
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/17
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank,
Peter Maydell <=
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- [Qemu-devel] [PATCH v10 3/5] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2012/01/17
- [Qemu-devel] [PATCH v10 2/5] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/17
- [Qemu-devel] [PATCH v10 5/5] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/17
[Qemu-devel] [PATCH v11 0/5] arm: add support for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 6/6] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 2/6] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19