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Re: [Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation ad
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation address when bus unit ID = 0x07F |
Date: |
Wed, 15 Jun 2011 08:19:30 +0200 |
On 14.06.2011, at 23:49, Andreas Färber wrote:
> Am 13.06.2011 um 15:31 schrieb Alexander Graf:
>
>> On 13.06.2011, at 12:13, Andreas Färber wrote:
>>
>>> + /* Memory forced */
>>> + ctx->raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF);
>>
>> This is exactly the same as ctx->raddr = eaddr, no?
>
> No, not that I see. The manual is explicit about this calculation:
>
> "the processor [...] generates a memory access
> with the physical address specified by the lowest-order four bits in the
> segment register
> (SR[28–31]) concatenated with LA4–LA31." (6-63 / 6.10.4)
>
> That matches figure 6-26 on the following page, and I've added a similar
> comment in v2.
>
> I see no compelling reason why the lower nibble of the SR should always match
> the SR#, the upper nibble of eaddr.
Ah, sr is not the segment register number, but the content of the segement
register. Then it's ok :).
Alex