[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation addres
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation address when bus unit ID = 0x07F |
Date: |
Mon, 13 Jun 2011 12:13:38 +0200 |
From: Hervé Poussineau <address@hidden>
In that case, we want to access memory space instead of I/O controller
interface address space.
Signed-off-by: Hervé Poussineau <address@hidden>
Simplify by avoiding reindentation of existing code.
Cc: Alexander Graf <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
---
Hello Alex,
This patch fixes a hang when booting 40p, please review.
The only vaguely related section in Power ISA 2.06B I could find was the
Programming Note on p. 764 (5.7.1).
6xx_pem.pdf identifies the masked SR bits as Bus unit ID, says nothing
about the 0x07f value though - might that be machine-specific?
Andreas
target-ppc/helper.c | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index cf2a368..cdf8d15 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -949,8 +949,18 @@ static inline int get_segment(CPUState *env, mmu_ctx_t
*ctx,
ret = -3;
}
} else {
+ target_ulong sr;
LOG_MMU("direct store...\n");
/* Direct-store segment : absolutely *BUGGY* for now */
+
+ sr = env->sr[eaddr >> 28];
+ if ((sr & 0x1FF00000) >> 20 == 0x07f) {
+ /* Memory forced */
+ ctx->raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF);
+ ctx->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+ return 0;
+ }
+
switch (type) {
case ACCESS_INT:
/* Integer load/store : only access allowed */
--
1.7.5.3
- [Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation address when bus unit ID = 0x07F,
Andreas Färber <=