[Qemu-devel] PowerPC implementations details

[l'indien]

In order to improve Qemu PowerPC emulation, I need a synthetic overview of
SPR registers, MSR bits assignments and implemented instructions for every
specific PowerPC implementation I want to emulate. As I was not able to
find this kind of documentation, I started to work on it. For those
interressed in PowerPC implementations details, here you'll find a first
overview of SPRs assignment tables and MSR bits settings.

Please note this is work in progress and still not complete. There may be
ommissions and/or errors. Feel free to contact me if you have more
informations about some specific points or if you find some errors in this
documentation.

Formated output:
<http://perso.magic.fr/l_indien/qemu-ppc/PPC_regs.dvi>
<http://perso.magic.fr/l_indien/qemu-ppc/PPC_regs.ps>
<http://perso.magic.fr/l_indien/qemu-ppc/PPC_regs.html>
<http://perso.magic.fr/l_indien/qemu-ppc/PPC_regs.txt>

Document sources:
<http://perso.magic.fr/l_indien/qemu-ppc/PPC_regs.lyx>
<http://perso.magic.fr/l_indien/qemu-ppc/PPC_regs.tex>

For more infos about Qemu and Qemu PowerPC emulation:
<http://fabrice.bellard.free.fr/qemu/>
<http://perso.magic.fr/l_indien/qemu-ppc/>