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Re:Another related question Re: [Qemu-devel] Question about softmmu

From: Ye Wen
Subject: Re:Another related question Re: [Qemu-devel] Question about softmmu
Date: Tue, 9 Nov 2004 11:33:00 -0800
User-agent: Internet Messaging Program (IMP) 3.2.5-cvs

Thanks for your reply, Olivier.

So EIP is just the offset of current instruction. When address mapping changes,
the CS segment register also changes. That's why QEMU does not need to flush
the code. Am I right?

The reason I'm thinking about this is because I'm implementing QEMU's
translation method in my ARM simulator which needs to simulate the whole system
running Linux. In ARM, since PC is just r15, you can access it as a normal
register and it is the absolute virtual address. So I wonder if I have to flush
code cache every time page table changes.

Quoting Olivier Cozette <address@hidden>:

>   Hello Ye,
> First, I will describe the memory access. All access to memory from the CPU,
> data access or load instruction access cross the TLB (Translation Look aside
> Buffer), the TLB convert the virtual address to the real address (it's a
> cache of the page mapping), so only the real address go to the memory
> subsystem or the cache. Note that the TLB are only flushed when you change
> CR3 value or if you use INVLPG instruction.
> -------
> | Proc|
> ------->=====>-------------
>               |  TLB      |
>               ------------->=======\/
>                                               --------------
>                                    | Cache/Memory|
>                                    ---------------
> With i386, the only to get the pc (eip register) is to use the CALL
> instruction, this instruction store the virtual next PC (eip) and so if the
> mapping change, the next PC change.
> With Qemu in target-i386/translate.c you have this code :
>     case 2: /* call Ev */
>             /* XXX: optimize if memory (no 'and' is necessary) */
>             if (s->dflag == 0)
>                 gen_op_andl_T0_ffff();
>             next_eip = s->pc - s->cs_base;
>             gen_op_movl_T1_im(next_eip);
>             gen_push_T1(s);
>             gen_op_jmp_T0();
>             gen_eob(s);
>             break;
> Olivier
> _______________________________________________
> Qemu-devel mailing list
> address@hidden
> http://lists.nongnu.org/mailman/listinfo/qemu-devel

Ye Wen

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