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Re:Another related question Re: [Qemu-devel] Question about softmmu

From: Ye Wen
Subject: Re:Another related question Re: [Qemu-devel] Question about softmmu
Date: Thu, 11 Nov 2004 00:21:40 -0800
User-agent: Internet Messaging Program (IMP) 3.2.5-cvs

Hi, Olivier:

Actually I'm thinking of a special case:
1. A basic block is translated and the PC value patched in is
   the virtual address when it is translated. At this time,
   the address mapping is virtual page 0 -> physical page 0
2. Now the mapping changes. virtual page 1 -> physical page 0,
   which means the physical location of the block doesn't change
   but its virtual address changes.
3. Since page table changes, the virtual pc hash flushed. But we
   still can find the block using physical hash.
4. Now the block is executed again. But since the embedded pc value
   is still the old value, will this cause problem?

Sorry to bother you again. But I'm really confused.

Quoting olivier cozette <address@hidden>:

>   Hello Ye,
> >So EIP is just the offset of current instruction.
> Yes
> >When address mapping changes,
> >the CS segment register also changes.
> No.
> The virtual adress is CS+EIP (CS.Base+EIP), this virtual address is
> translated
> to the physical address with the page mapping. In pseudo code, the real
> address
> is PAGE_MAPPING(CS+EIP). So, if the page mapping change the CS stay the same.
> >That's why QEMU does not need to flush
> >the code. Am I right?
> >The reason I'm thinking about this is because I'm implementing QEMU's
> >translation method in my ARM simulator which needs to simulate the whole
> system
> >running Linux. In ARM, since PC is just r15, you can access it as a normal
> >register and it is the absolute virtual address. So I wonder if I have to
> flush
> >code cache every time page table changes.
> I don't know well ARM processor, but i know Alpha, and it's different from
> the
> x86.
> With x86, the data stored in the data/code cache are stored with the physical
> address (page mapping is done between processor and cache), and so the cache
> don't need to be flushed when page mapping change (CR3 change).
> With alpha (and probably arm), the address stored in cache are the virtual
> address (page mapping is done between cache and memory).
> But, i presume this difference have no impact with Qemu cache, and it will be
> better to don't flush qemu cache.
>    Olivier
> Thanks,
> Ye
> _______________________________________________
> Qemu-devel mailing list
> address@hidden
> http://lists.nongnu.org/mailman/listinfo/qemu-devel

Ye Wen

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