Re: [Qemu-block] [Qemu-devel] Configuring pflash devices for OVMF firmware

[Paolo Bonzini]

On 01/02/19 00:28, Alexandro Sanchez Bach wrote:
> (CC'd Yu Ning @ Intel's HAXM team)
> 
> Not sure, if I'm understanding the issue correctly, but isn't
> `HAX_VM_IOCTL_SET_RAM2` with the `HAX_RAM_INFO_ROM` flag precisely
> what you are looking for?
> 
> More precisely, HAX_VM_IOCTL_SET_RAM2 maps an HVA range to a GPA
> range, the HAX_RAM_INFO_ROM flag should allow only guest memory reads
> to that range [1]. When the guest attempts to write, this should
> trigger a VM exit that will be handled by QEMU.

The missing handling is in the hypervisor:

    if (ret == -EACCES) {
        /*
         * For some reason, during boot-up, Chrome OS guests make
hundreds of
         * attempts to write to GPAs close to 4GB, which are mapped into
BIOS
         * (read-only) and thus result in EPT violations.
         * TODO: Handle this case properly.
         */
        hax_warning("%s: Unexpected EPT violation cause. Skipping
instruction"
                    " (len=%u)\n", __func__, vcpu->vmx.exit_instr_length);
        advance_rip(vcpu);
        return HAX_EXIT;
}

> Also, this seems to be handled here:
> https://github.com/qemu/qemu/blob/15bede554162dda822cd762c689edb6fa32b6e3b/target/i386/hax-mem.c#L205-L207

Right, though to be precise it should be changed to

     if (memory_region_is_rom(section->mr) ||
         memory_region_is_romd(section->mr)) {         flags |= 
HAX_RAM_INFO_ROM;
     }

for that to work.

Paolo