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Re: [Qemu-arm] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' alw
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-arm] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' always true |
Date: |
Tue, 7 Aug 2018 12:13:57 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 08/07/2018 09:57 AM, Joel Stanley wrote:
> The SDRAM training routine sets the 'Enable cache initial' bit, and then
> waits for the 'cache initial sequence' to be done.
>
> Have it always return done, as there is no other side effects that the
> model needs to implement. This allows the upstream u-boot training to
> proceed on the ast2500-evb board.
>
> Signed-off-by: Joel Stanley <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Thanks,
C.
> ---
> hw/misc/aspeed_sdmc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
> index 24fd4aee2d82..9ece545c4ffa 100644
> --- a/hw/misc/aspeed_sdmc.c
> +++ b/hw/misc/aspeed_sdmc.c
> @@ -226,6 +226,7 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error
> **errp)
> s->ram_bits = ast2500_rambits(s);
> s->fixed_conf = ASPEED_SDMC_HW_VERSION(1) |
> ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
> + ASPEED_SDMC_CACHE_INITIAL_DONE |
> ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
> break;
> default:
>
- [Qemu-arm] [PATCH 0/7] arm: aspeed: Extend SDRAM controller, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 1/7] aspeed_sdmc: Extend number of valid registers, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 2/7] aspeed_sdmc: Fix saved values, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' always true, Joel Stanley, 2018/08/07
- Re: [Qemu-arm] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' always true,
Cédric Le Goater <=
- [Qemu-arm] [PATCH 4/7] aspeed_sdmc: Init status alwlays idle, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 5/7] aspeed_sdmc: Handle ECC training, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 6/7] aspeed: add a max_ram_size property to the memory controller, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 7/7] aspeed: Link SCU to the watchdog, Joel Stanley, 2018/08/07