Re: how to force a second variable expansion?

[Paul D. Smith]

%% "Robert P. J. Day" <address@hidden> writes:

  rpjd>   i have a normally-straightforward macro to process subdirectories:

  rpjd>     define do-subdirs
  rpjd>     @for dir in ${SUBDIRS} ; do                    \
  rpjd>         ${MAKE} CF=$${$${dir}_CONFIG_FILE} -C $@ ; \  (clearly wrong)
  rpjd>                 ??????????????????????????
  rpjd>     done
  rpjd>     endef

Of course, this cannot work.

  rpjd> i've tried various combinations of variable expansion methods
  rpjd> and nothing seems to give me what i'm after.  can i do this with
  rpjd> just variable references?  or do i need to resort to some form
  rpjd> of "eval"?

You can't do it at all, at least not this way.

You are getting confused between shell variables ($dir) and make
variables (xx_CONFIG_FILE).  All interaction between make and the shell
is one way: first make evaluates all its variables, then it passes the
result to the shell and the shell runs, doing whatever it does including
setting its own variables.

It's NEVER possible for the shell to "query back" to the parent make
process and ask it to resolve some variable, so there's no way you can
evaluate a MAKE variable like xx_CONFIG_FILE where the "xx" value is
contained in a SHELL variable like $dir.


It simply cannot be done.

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