Re: Questions on B200 PPS

[Martin Braun]

Marcus is right, "_external_" is a B200- and N2x0-only feature.

I also think 8 ms should be fine, but just as an FYI, "our" PPS signals have a 25% duty cycle (so, 250 ms). Since we only register the pos. edge, anything in the ms-range should be working. When you say "occasionally", do you mean within a single session? I.e., you init the device, set the time, and then don't touch the device any more?

As an experiment, can you try a time that's not on the PPS edge (like. .5 seconds off)?

Really, the PPS shouldn't be the issue here, since it's only used once (to set the time).

--M

On Fri, Sep 10, 2021 at 8:49 PM Marcus D. Leech <patchvonbraun@gmail.com> wrote:

On 2021-09-10 2:35 p.m., Mike wrote:

Hello,

We are using an external GPSDO to provide 10 MHz and PPS into a B200.

Our application collects a fixed number of samples at 50 MSPS using a stream command (UHD_STREAM_MODE_NUM_SAMPS_AND_DONE and the timespec for the next PPS).  In this way we rely on the USRP to provide samples that begin at the instant of PPS arrival.

This works almost all the time.  Occasionally, it appears we miss one sample (20 ns) and thus our timing is off.  We suspect this is due some behavior in the B200 related to the PPS.

We are using a Stanford Research FS740 for our GPSDO and have it set to provide a 5 volt PPS pulse with a duration of 8 microseconds.

Questions:

1.  Is 8 milliseconds long enough for a PPS signal?  If not, what value would be appropriate?

That should be plenty.

2.  Documentation shows an alternate for the

usrp->set_time_source("external");

command that uses underscores on either side of the word, as

usrp->set_time_source("_external_");

What exactly does this command do relative to the leading edge of the PPS signal?

My recollection is that this is a leading-vs-trailing option in PPS processing--I'm not even certain that the B2xx family supports that flexibility.

It may be that what you're seeing is a sampling anomaly with respect to the PPS.  If the PPS is *sampled* by the FPGA at 50MHz, you would expect there
  to be occasional anomalies of 1 sample time.  But I am not intimately familiar with the FPGA code, so I'm not sure.

To the extent it matters, we are operating under Ubuntu 20.04 with UHD 3.15.

Thanks!