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[Discuss-gnuradio] FPGA bit file -- again
From: |
Angilberto Muniz Sb |
Subject: |
[Discuss-gnuradio] FPGA bit file -- again |
Date: |
Mon, 12 Dec 2005 16:46:05 -0800 (PST) |
I'm trying to bypass the hardware DDC/DUC and tying to
implement the FPGA based UP/DOWN conveters.
Looking into 'ddc.v' and 'duc.v' we see references to
'cic_decim_2stage' and 'cic_interp_2stage'
respectively, but there are no '.v' equivalent files
-- the close to it are 'cic_interp.v' and
'cic_decim.v' --
I assume the '_2state' refers to '2nd stage decimating
and interpolating' -- Am I right?
Is it just tipo error? If so, how come I get no error
compiling the project under Quartus?
Thank you,
Angilberto.
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