[Commit-gnuradio] r5935 - gnuradio/branches/developers/matt/u2f/top/u2_sim

[matt]

Author: matt
Date: 2007-07-11 14:09:46 -0600 (Wed, 11 Jul 2007)
New Revision: 5935

Modified:
   gnuradio/branches/developers/matt/u2f/top/u2_sim/
   gnuradio/branches/developers/matt/u2f/top/u2_sim/u2_sim_top.v
Log:
lxt dumps, serdes model, program-controlled exit from simulation



Property changes on: gnuradio/branches/developers/matt/u2f/top/u2_sim
___________________________________________________________________
Name: svn:ignore
   - *.vcd
*.sav

   + *.vcd
*.sav
u2_sim
*.rom
*.lxt
a.out


Modified: gnuradio/branches/developers/matt/u2f/top/u2_sim/u2_sim_top.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/u2_sim/u2_sim_top.v       
2007-07-11 19:42:40 UTC (rev 5934)
+++ gnuradio/branches/developers/matt/u2f/top/u2_sim/u2_sim_top.v       
2007-07-11 20:09:46 UTC (rev 5935)
@@ -143,7 +143,7 @@
      $monitor($time, ,clock_ready);
    
    initial begin
-      $dumpfile("u2_sim_top.vcd");
+      $dumpfile("u2_sim_top.lxt");
       $dumpvars(0,u2_sim_top);
    end
 
@@ -152,6 +152,11 @@
    cpld_model 
      cpld_model 
(.aux_clk(aux_clk),.start(cpld_start),.mode(cpld_mode),.done(cpld_done),
                 .dout(cpld_din),.sclk(cpld_clk),.detached(cpld_detached));
+     
+   serdes_model serdes_model
+     (.ser_tx_clk(ser_tx_clk), .ser_tkmsb(ser_tkmsb), .ser_tklsb(ser_tklsb), 
.ser_t(ser_t),
+      .ser_rx_clk(ser_rx_clk), .ser_rkmsb(ser_rkmsb), .ser_rklsb(ser_rklsb), 
.ser_r(ser_r),
+      .even(0));
    
    u2_basic u2_basic(.dsp_clk          (dsp_clk),
                     .wb_clk            (wb_clk),
@@ -246,12 +251,12 @@
        if((u2_basic.m0_we == 1'd1)&&(u2_basic.m0_adr == 16'hC008))
          $display("");
      end
+
+   // End the simulation
+   always @(posedge wb_clk)
+     if((u2_basic.m0_we == 1'd1)&&(u2_basic.m0_adr == 16'hC200))
+       $finish;
        
+       
 
 endmodule // u2_sim_top
-
-// Local Variables:
-// verilog-library-directories:("." "subdir" "subdir2")
-// verilog-library-files:("/home/matt/u2f/top/u2_basic/u2_basic.v")
-// verilog-library-extensions:(".v" ".h")
-// End: