Waking up the AHCI device

[Paul Dufresne]

I am interested by the fact that when booting Mach on most real hardware I see 
an error:
from:
printk("ahci: %02x:%02x.%x: Port %u phy offline?!\n", bus, dev, fun, i);
line 919 of 
https://git.savannah.gnu.org/cgit/hurd/gnumach.git/tree/linux/dev/drivers/block/ahci.c

line 35 of 
https://git.savannah.gnu.org/cgit/hurd/gnumach.git/tree/linux/dev/include/ahci.h
 says:
 * AHCI hardware documentation:
 * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
 * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf
which suggest the code was written when version 1.1 was current.

We now have: 1.3.1 at:
https://www.intel.ca/content/www/ca/fr/io/serial-ata/serial-ata-ahci-spec-rev1-3-1.html

To be honest... I do my best to understand... but it is quite complex.

Anyway, section 10.1.2 page 103 begin with:
"This  section  describes  how  system  software  places the  AHCI  HBA  into  
a  minimallyinitialized  state."
...
"Software may perform an HBA reset prior to initializing the controller by 
setting GHC.AE to ‘1’ and then setting GHC.HR to ‘1’ if desired. "
...
GHC.AE is describe in 3.1.2 page 17: bit 31 of GHC:
Software shall set this bit to ‘1’ before accessing other AHCI registers.
...
The  implementation  of  this  bit  is  dependent  upon  the  value  of  the  
CAP.SAM  bit.    If CAP.SAM is '0', then GHC.AE shallbe read-write and shall 
have a reset value of '0'. If CAP.SAM is '1', then AE shall be read-only and 
shall have a reset value of '1'.

I suspect CAP.SAM was 0 in previous versions... did not check.
But that most computers now have CAP.SAM to 1, so that GHC.AE should be 
written, even if already to 1, to "wake up" the device.
I suspect current implementation of AHCI in Mach does not it.