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Re: [Avr-libc-corelib] The SPI implementation


From: Frédéric Nadeau
Subject: Re: [Avr-libc-corelib] The SPI implementation
Date: Wed, 23 Sep 2009 08:43:48 -0400

On Wed, Sep 23, 2009 at 1:18 AM, Ron Kreymborg <address@hidden> wrote:

> Well the master call would call the slave call in the library after setting
> the delay flag, so no duplication.
>
I might just not get what you ment then.

>
> No spi clock Fosc/2 as many spi slaves are only guaranteed to work at
> Fosc/4.

This I don't get: spi slave are only guaranteed to work at Fosc/4. As
far as I understand it the slave work at a maximum SPI clock. I'm not
sure what you meant by that, but that does not prevent the ATmega from
working at Fosc/2. Here are two examples.

1 An ATmega plug to an SD/MMC card. those support up to 25MHz SPI
clock. Way faster than even the 20Mhz/2 of some ATmega

2 An ATmega plug to a CANBus transceiver CP2515 who has it's own
external clock and work at SPI 10Mhz.

My opinion is that it falls on the developers burden to make sure that
the SPI clock it uses is slower or as fast as what the device can work
with.

If not including the SPI_CLK2, at least I think it is appropriate to
have a separate function like:
spi_set_double_clock_rate(), or something alike.

My opinion
-- 
Frédéric Nadeau ing. jr




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