[Simulavr-devel] I/O map for usart1

[Keith Gudger]

Ted:

My employer has made a mess of mapping the 2nd UART into the I/O space of
the different devices.  Here is some of the mappings I've found so far:

Part Name    UDR1  Extended I/O?  Vector Address
ATMega64     0x9c  Yes            0x3E
ATMega128    0x9c  Yes            0x3E
ATMega161    0x23  No             0x1e
ATMega162    0x23  Yes            0x2c

I *was* planning to use the fact that the 128 etc. parts had an extended
I/O space to map the UART registers in the proper space, then I found the
162 has the extended I/O space and the 2nd UART at the bottom of the I/O
space!

Any suggestions?  I'm currently using the 128 to check out UART1, as I
would have to add some of the other parts if I want to check their I/O
addresses.  Adding those parts entails changing the intvects.x stuff, too.

Keith