Re: [Simulavr-devel] gdbinit for raising interrupts.

[Marko Panger]

Here is the file...

Is the patch you are talking about included in the latest version from 
CVS ?


Theodore A. Roth wrote:

> On Sun, 2 Nov 2003, Marko Panger wrote:
>
>  
>
> > Yesterday night I tried the latest CVS version with the rising irq patch 
> > included and it works great.
> >
> > 1) I just like to ask why the interrupt vector numbering in avr-libc and
> > the one in the mega128 datasheet isn't the same.  For example timer0
> > output compare interrupt is on vector nr. 10, according to the datasheet
> > and if I would like to trigger this interrupt from gdb I have to rise
> > irq_9.
> >    
>
> I think that avr-libc is more concerned with the the address of the vector 
> than number of the interrupt vector. Thus, the RESET vector is at address 
> 0x0000, etc.
>
>  
>
> > At the same time the same interrupt is defined on vector 15 avr-gcc
> > (__vector_15) ? A little bit confusing or I am just looking at thins from
> > a bad angle ?
> >    
>
> No, it's most definitely confusing. I should really fix it so that irq_<NN> 
> maps into __vector_<NN>. Let me think on that a bit.
>
>  
>
> > Anyway I am able to trigger interrupts and I am just happy ! Thanks.
> >
> > 2) Regarding the timer0 functionality I have made a simple program which 
> > stays in a while(2) loop and waits timer0 output comapre function to 
> > trigger my interrupt handler but nothing happens.
> >    
>
> Can you send me your program? I have a feeling that you might be hitting the 
> problem addressed by this patch:
>
>  http://savannah.nongnu.org/patch/?func=detailpatch&patch_id=1764&group_id=997
>
> Ted Roth
>
>
>  

#include <avr/io.h>
#include <avr/pgmspace.h>
#include <avr/signal.h>

volatile uint16 i;
SIGNAL(SIG_OUTPUT_COMPARE0) {
        i++;
}

/*###############################################################################*/
/*#                             Main                                            
#*/
/*###############################################################################*/
int main(void) {
    OCR0                = 125;                                                  
                        // set output compare match register, timer tick 1ms
        TCCR0           = (1 << WGM01) + (1 << CS02) + (1 << CS00);     //clear 
on compare match mode, Fclk/128
        TIMSK           |= (1 << OCIE0);                                        
                // enable output compare interrupt
        TCNT0       = 0x00;
    asm volatile("sei");

    while(1) {
        if(i == 123) {
            i = 0x00;
        }
        asm volatile("nop");
    }
        return 0;
}