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Re: [Qemu-ppc] [PATCH] spapr: Add ibm, processor-storage-keys property t
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH] spapr: Add ibm, processor-storage-keys property to CPU DT node |
Date: |
Wed, 30 Aug 2017 10:43:09 +1000 |
User-agent: |
Mutt/1.8.3 (2017-05-23) |
On Tue, Aug 29, 2017 at 09:31:07AM -0700, Ram Pai wrote:
> On Tue, Aug 29, 2017 at 11:40:30AM +1000, David Gibson wrote:
> > On Mon, Aug 28, 2017 at 10:53:56AM -0700, Ram Pai wrote:
> > > On Thu, Aug 24, 2017 at 12:54:48PM +1000, Paul Mackerras wrote:
> > > >
> > > > We could either have two u16 fields for the number of keys for data
> > > > and instruction, or we could have a u32 field for the number of keys
> > > > and a separate bit in the flags field to indicate that instruction
> > > > keys are supported. Which would be preferable?
> > >
> > > the second choice is more confusion-proof; to me atleast.
> > >
> > > The first choice gives a illusion that there are 'x' number of data keys
> > > and 'y' number of instruction keys; which is not exactly true.
> >
> > Ah.. can you elaborate?
>
> On power8 and power9, there are only 32 keys, each key can be configured to
> disable data-access and instruction-access. The first choice, will
> report 32 keys for data-access and 32 keys for instruction-access. To a
> casual on-looker it gives an impresssion that there are 32 keys for
> data-access and 32 keys for instruction-access; 64 keys in total. And
> that is what I think can be the cause for confusion.
Ah, I see.
Paul, sorry, I hadn't realized the above when I said I preferred
separate values for data and instr keys. In view of the above, I
change my preference to a single # of keys and a flag that they can be
used for instructions.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [Qemu-ppc] [PATCH] spapr: Add ibm, processor-storage-keys property to CPU DT node, Ram Pai, 2017/08/28