Re: [Qemu-ppc] [PATCH] spapr: Add ibm, processor-storage-keys property to CPU DT node

[Ram Pai]

On Tue, Aug 29, 2017 at 11:40:30AM +1000, David Gibson wrote:
> On Mon, Aug 28, 2017 at 10:53:56AM -0700, Ram Pai wrote:
> > On Thu, Aug 24, 2017 at 12:54:48PM +1000, Paul Mackerras wrote:
> > > 
> > > We could either have two u16 fields for the number of keys for data
> > > and instruction, or we could have a u32 field for the number of keys
> > > and a separate bit in the flags field to indicate that instruction
> > > keys are supported.  Which would be preferable?
> > 
> > the second choice is more confusion-proof; to me atleast.
> > 
> > The first choice gives a illusion that there are 'x' number of data keys
> > and 'y' number of instruction keys; which is not exactly true.
> 
> Ah.. can you elaborate?

On power8 and power9, there are only 32 keys, each key can be configured to
disable data-access and instruction-access.  The first choice, will
report 32 keys for data-access and 32 keys for instruction-access. To a
casual on-looker it gives an impresssion that there are 32 keys for
data-access and 32 keys for instruction-access; 64 keys in total. And
that is what I think can be the cause for confusion.



RP