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[Qemu-devel] [PULL 14/47] hw/arm/armsse: Put each CPU in its own cluster
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/47] hw/arm/armsse: Put each CPU in its own cluster object |
Date: |
Fri, 1 Feb 2019 16:06:20 +0000 |
Create a cluster object to hold each CPU in the SSE. They are
logically distinct and may be configured differently (for instance
one may not have an FPU where the other does).
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
include/hw/arm/armsse.h | 2 ++
hw/arm/armsse.c | 31 ++++++++++++++++++++++++++++---
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index 89f19a971f4..999c2e4f7e5 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -80,6 +80,7 @@
#include "hw/misc/iotkit-sysinfo.h"
#include "hw/or-irq.h"
#include "hw/core/split-irq.h"
+#include "hw/cpu/cluster.h"
#define TYPE_ARMSSE "arm-sse"
#define ARMSSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARMSSE)
@@ -110,6 +111,7 @@ typedef struct ARMSSE {
/*< public >*/
ARMv7MState armv7m[SSE_MAX_CPUS];
+ CPUClusterState cluster[SSE_MAX_CPUS];
IoTKitSecCtl secctl;
TZPPC apb_ppc0;
TZPPC apb_ppc1;
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 2472dfef3a1..2eb4ea3bfe0 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -147,9 +147,22 @@ static void armsse_init(Object *obj)
memory_region_init(&s->container, obj, "armsse-container", UINT64_MAX);
for (i = 0; i < info->num_cpus; i++) {
- char *name = g_strdup_printf("armv7m%d", i);
- sysbus_init_child_obj(obj, name, &s->armv7m[i], sizeof(s->armv7m),
- TYPE_ARMV7M);
+ /*
+ * We put each CPU in its own cluster as they are logically
+ * distinct and may be configured differently.
+ */
+ char *name;
+
+ name = g_strdup_printf("cluster%d", i);
+ object_initialize_child(obj, name, &s->cluster[i],
+ sizeof(s->cluster[i]), TYPE_CPU_CLUSTER,
+ &error_abort, NULL);
+ qdev_prop_set_uint32(DEVICE(&s->cluster[i]), "cluster-id", i);
+ g_free(name);
+
+ name = g_strdup_printf("armv7m%d", i);
+ sysbus_init_child_obj(OBJECT(&s->cluster[i]), name,
+ &s->armv7m[i], sizeof(s->armv7m), TYPE_ARMV7M);
qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type",
ARM_CPU_TYPE_NAME("cortex-m33"));
g_free(name);
@@ -406,6 +419,18 @@ static void armsse_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
+ /*
+ * The cluster must be realized after the armv7m container, as
+ * the container's CPU object is only created on realize, and the
+ * CPU must exist and have been parented into the cluster before
+ * the cluster is realized.
+ */
+ object_property_set_bool(OBJECT(&s->cluster[i]),
+ true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
/* Connect EXP_IRQ/EXP_CPUn_IRQ GPIOs to the NVIC's lines 32 and up */
s->exp_irqs[i] = g_new(qemu_irq, s->exp_numirq);
--
2.20.1
- [Qemu-devel] [PULL 00/47] target-arm queue, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 02/47] armv7m: Don't assume the NVIC's CPU is CPU 0, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 01/47] hw/arm/nrf51_soc: set object owner in memory_region_init_ram, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 03/47] armv7m: Make cpu object a child of the armv7m container, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 04/47] armv7m: Pass through start-powered-off CPU property, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 18/47] hw/arm/armsse: Add unimplemented-device stub for cache control registers, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 05/47] hw/arm/iotkit: Rename IoTKit to ARMSSE, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 14/47] hw/arm/armsse: Put each CPU in its own cluster object,
Peter Maydell <=
- [Qemu-devel] [PULL 06/47] hw/arm/iotkit: Refactor into abstract base class and subclass, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 29/47] target/arm/translate-a64: Don't underdecode add/sub extended register, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 22/47] hw/arm/armsse: Add SSE-200 model, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 07/47] hw/arm/iotkit: Rename 'iotkit' local variables and functions, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 21/47] hw/arm/armsse: Add CPU_IDENTITY block to SSE-200, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 42/47] linux-user: Initialize aarch64 pac keys, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 31/47] target/arm/translate-a64: Don't underdecode SDOT and UDOT, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 27/47] target/arm/translate-a64: Don't underdecode SIMD ld/st multiple, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 35/47] target/arm: Send interrupts on PMU counter overflow, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 25/47] target/arm/translate-a64: Don't underdecode system instructions, Peter Maydell, 2019/02/01