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Re: [Qemu-devel] [RFC PATCH 11/11] target/mips: Port MIPS64 DCL[Z/O] to
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [RFC PATCH 11/11] target/mips: Port MIPS64 DCL[Z/O] to decodetree |
Date: |
Mon, 12 Nov 2018 10:17:01 +0100 |
On Mon, Nov 12, 2018 at 10:15 AM Richard Henderson
<address@hidden> wrote:
>
> On 11/12/18 12:36 AM, Philippe Mathieu-Daudé wrote:
> > +dclz 011100 ..... ..... ..... ..... 100100 @rs_rt_rd
> > ?ctx->insn_flags&ISA_MIPS64
> > +dclo 011100 ..... ..... ..... ..... 100101 @rs_rt_rd
> > ?ctx->insn_flags&ISA_MIPS64
>
> This syntax I do not like. I preferred your other form,
>
> >isa(ISA_MIPS64)
>
> which, with a change to return false as I suggested, would
> have the same effect.
>
> As an aside, you could do
>
> #define check_isa(ctx, which) ((ctx)->insn_flags & ISA_##which)
>
> to reduce the decode markup to
>
> >isa(MIPS64)
Very good idea! Thanks :)
- [Qemu-devel] [RFC PATCH 00/11] decodetree: Add tokens to ease checking ISA flags, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 05/11] decodetree: Force Python to print unsigned values, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 11/11] target/mips: Port MIPS64 DCL[Z/O] to decodetree, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 07/11] scripts/decodetree: Add add_func_check(), Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 03/11] target/mips: Move the !ISA_MIPS32R6 check out of decode_opc_special2_legacy, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 01/11] MAINTAINERS: Add scripts/decodetree.py to the TCG section, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 04/11] target/mips: Avoid access to CPUMIPSState from decode* functions, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 06/11] scripts/decodetree: Allow empty specifications, Philippe Mathieu-Daudé, 2018/11/11
- [Qemu-devel] [RFC PATCH 09/11] target/mips: Port SYNCI to decodetree, Philippe Mathieu-Daudé, 2018/11/11