On Tue, Sep 11, 2018 at 11:49:49AM -0500, Brijesh Singh wrote:
Now that amd-iommu support interrupt remapping, enable the GASup in IVRS
table and GASup in extended feature register to indicate that IOMMU
support guest virtual APIC mode.
Note that the GAMSup is set to zero to indicate that Guest Virtual
APIC does not support advanced interrupt features (i.e virtualized
interrupts using the guest virtual APIC).
See Table 21 from IOMMU spec for interrupt virtualization controls
IOMMU spec: https://support.amd.com/TechDocs/48882_IOMMU.pdf
Cc: "Michael S. Tsirkin" <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Cc: Richard Henderson <address@hidden>
Cc: Eduardo Habkost <address@hidden>
Cc: Marcel Apfelbaum <address@hidden>
Cc: Tom Lendacky <address@hidden>
Cc: Suravee Suthikulpanit <address@hidden>
Signed-off-by: Brijesh Singh <address@hidden>
---
hw/i386/acpi-build.c | 3 ++-
hw/i386/amd_iommu.h | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 5c2c638..1cbc8ba 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2565,7 +2565,8 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linker)
build_append_int_noprefix(table_data,
(48UL << 30) | /* HATS */
(48UL << 28) | /* GATS */
- (1UL << 2), /* GTSup */
+ (1UL << 2) | /* GTSup */
+ (1UL << 6), /* GASup */
Sorry if I misunderstood - is this for nested?
I'm a bit confused here... IIUC in your previous patches you didn't
really implement guest_mode==1 case in IRTEs. So if you have this set
then the guest should be able to setup IRTEs with guest_mode==1? How
did it work?
Thanks,