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[Qemu-devel] [PATCH v3 21/38] target-microblaze: Setup for 64bit address
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v3 21/38] target-microblaze: Setup for 64bit addressing |
Date: |
Wed, 16 May 2018 20:51:29 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Setup MicroBlaze builds for 64bit addressing.
No functional change since the translator does not yet
emit 64bit addresses.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
configure | 1 +
target/microblaze/cpu.h | 6 +++---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 59f91ab3f9..5626499e99 100755
--- a/configure
+++ b/configure
@@ -6844,6 +6844,7 @@ case "$target_name" in
microblaze|microblazeel)
TARGET_ARCH=microblaze
bflt="yes"
+ echo "TARGET_ABI32=y" >> $config_target_mak
;;
mips|mipsel)
TARGET_ARCH=mips
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 215f42b384..b631b7dc4c 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -23,7 +23,7 @@
#include "qemu-common.h"
#include "cpu-qom.h"
-#define TARGET_LONG_BITS 32
+#define TARGET_LONG_BITS 64
#define CPUArchState struct CPUMBState
@@ -340,8 +340,8 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
-#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#define TARGET_PHYS_ADDR_SPACE_BITS 64
+#define TARGET_VIRT_ADDR_SPACE_BITS 64
#define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU
--
2.14.1
- [Qemu-devel] [PATCH v3 14/38] target-microblaze: Name special registers we support, (continued)
- [Qemu-devel] [PATCH v3 14/38] target-microblaze: Name special registers we support, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 15/38] target-microblaze: Break out trap_userspace(), Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 16/38] target-microblaze: Break out trap_illegal(), Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 18/38] target-microblaze: dec_msr: Reuse more code when reg-decoding, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 19/38] target-microblaze: dec_msr: Fix MTS to FSR, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 17/38] target-microblaze: dec_msr: Use bool and extract32, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 20/38] target-microblaze: Make special registers 64-bit, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 23/38] target-microblaze: Implement MFSE EAR, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 21/38] target-microblaze: Setup for 64bit addressing,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v3 24/38] target-microblaze: mmu: Add R_TBLX_MISS macros, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 25/38] target-microblaze: mmu: Remove unused register state, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 26/38] target-microblaze: mmu: Prepare for 64-bit addresses, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 27/38] target-microblaze: mmu: Add a configurable output address mask, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 28/38] target-microblaze: dec_msr: Plug a temp leak, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 30/38] target-microblaze: Allow address sizes between 32 and 64 bits, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 32/38] target-microblaze: mmu: Cleanup debug log messages, Edgar E. Iglesias, 2018/05/16