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Re: [Qemu-devel] [PATCH 3/7] target/arm: Get PRECISERR and IBUSERR the r
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 3/7] target/arm: Get PRECISERR and IBUSERR the right way round |
Date: |
Wed, 13 Sep 2017 08:57:03 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 |
On 09/11/2017 06:52 AM, Peter Maydell wrote:
> For a bus fault, the M profile BFSR bit PRECISERR means a bus
> fault on a data access, and IBUSERR means a bus fault on an
> instruction access. We had these the wrong way around; fix this.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/helper.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-devel] [PATCH 0/7] ARMv8M: some bugfixes and prep. cleanup, Peter Maydell, 2017/09/11
- [Qemu-devel] [PATCH 4/7] nvic: Don't apply group priority mask to negative priorities, Peter Maydell, 2017/09/11
- [Qemu-devel] [PATCH 3/7] target/arm: Get PRECISERR and IBUSERR the right way round, Peter Maydell, 2017/09/11
- [Qemu-devel] [PATCH 7/7] target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit(), Peter Maydell, 2017/09/11
- [Qemu-devel] [PATCH 2/7] target/arm: Clear exclusive monitor on v7M reset, exception entry/exit, Peter Maydell, 2017/09/11
- [Qemu-devel] [PATCH 6/7] target/arm: Add and use defines for EXCRET constants, Peter Maydell, 2017/09/11
- [Qemu-devel] [PATCH 1/7] target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2, Peter Maydell, 2017/09/11