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Re: [Qemu-devel] [PATCH v3 7/8] intel_iommu: keep buggy EIM enabled in 2


From: Igor Mammedov
Subject: Re: [Qemu-devel] [PATCH v3 7/8] intel_iommu: keep buggy EIM enabled in 2.7 machine type
Date: Tue, 4 Oct 2016 14:18:22 +0200

On Fri, 30 Sep 2016 18:10:12 +0200
Radim Krčmář <address@hidden> wrote:

> QEMU 2.7 allowed EIM even in configurations that were forbidden in the
> last patch because they were not working, like old KVM or userspace
> APIC.  In order to keep backward compatibility, we again allow guests to
> misbehave in non-obvious ways, and make it the default.
> 
> Signed-off-by: Radim Krčmář <address@hidden>
> ---
> v3: shorten the code [Peter]
> ---
>  hw/i386/intel_iommu.c | 12 +++++++-----
>  hw/i386/pc_q35.c      |  2 ++
>  include/hw/i386/pc.h  |  2 ++
>  3 files changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index efb018b85544..13a2ac5a8fb9 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -2456,9 +2456,11 @@ static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, 
> void *opaque, int devfn)
>      return &vtd_as->as;
>  }
>  
> -static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
> +static bool vtd_decide_config(IntelIOMMUState *s, PCMachineState *pcms,
> +                              Error **errp)
>  {
>      X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
> +    PCMachineClass *pcmc = PC_MACHINE_CLASS(MACHINE_GET_CLASS(pcms));
It's a bit backwards, for devices we usually add a property to affected device
and use compat macros to do the job. As example look at
commit 048a2e8869cb7e26013e40d860c9ebdf8e28c2ac
    x86: ioapic: boost default version to 0x20


>  
>      /* Currently Intel IOMMU IR only support "kernel-irqchip={off|split}" */
>      if (x86_iommu->intr_supported && kvm_irqchip_in_kernel() &&
> @@ -2473,11 +2475,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, 
> Error **errp)
>      }
>  
>      if (s->intr_eim == ON_OFF_AUTO_AUTO) {
> -        s->intr_eim = x86_iommu->intr_supported && kvm_irqchip_in_kernel() ?
> +        s->intr_eim = (kvm_irqchip_in_kernel() || 
> pcmc->buggy_intel_iommu_eim)
> +                      && x86_iommu->intr_supported ?
>                                                ON_OFF_AUTO_ON : 
> ON_OFF_AUTO_OFF;
>      }
> -
> -    if (s->intr_eim == ON_OFF_AUTO_ON) {
> +    if (s->intr_eim == ON_OFF_AUTO_ON && !pcmc->buggy_intel_iommu_eim) {
>          if (kvm_irqchip_in_kernel() && !kvm_enable_x2apic()) {
>              error_setg(errp, "eim=on requires support on the KVM side"
>                               "(X2APIC_API, first shipped in v4.7)");
> @@ -2502,7 +2504,7 @@ static void vtd_realize(DeviceState *dev, Error **errp)
>      VTD_DPRINTF(GENERAL, "");
>      x86_iommu->type = TYPE_INTEL;
>  
> -    if (!vtd_decide_config(s, errp)) {
> +    if (!vtd_decide_config(s, pcms, errp)) {
>          return;
>      }
>  
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index 0b214f24c977..97f419fbf4dd 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -304,8 +304,10 @@ DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
>  
>  static void pc_q35_2_7_machine_options(MachineClass *m)
>  {
> +    PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
>      pc_q35_2_8_machine_options(m);
>      m->alias = NULL;
> +    pcmc->buggy_intel_iommu_eim = true;
>      SET_MACHINE_COMPAT(m, PC_COMPAT_2_7);
>  }
>  
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 47bdf10cfd9b..4bd435f8fa5c 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -143,6 +143,8 @@ struct PCMachineClass {
>      bool save_tsc_khz;
>      /* generate legacy CPU hotplug AML */
>      bool legacy_cpu_hotplug;
> +    /* enable buggy Intel-IOMMU EIM by default */
> +    bool buggy_intel_iommu_eim;
>  };
>  
>  #define TYPE_PC_MACHINE "generic-pc-machine"




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