Re: [Qemu-devel] Making cputlb.c operations safe for MTTCG

[Paolo Bonzini]

> On 08/02/2016 12:07 PM, Alex Bennée wrote:
> > This will work but I wonder if it is time to call it a day for 32 on 64
> > support? I mean all this can be worked around but I wonder if it is
> > worth the effort if no one actually uses this combination.
> 
> I've been meaning to bring up exactly this question during the 2.8 cycle.
> 
> Given the changes we want to make with target atomic operations, I think it's
> a complete waste of time to continue to support 64-on-32.

The only interesting 32-bit host IMO is arm, and it does support double-word
atomics on ARMv7+ (only through ldrdex/strdex if < Cortex-A15).  MIPS doesn't,
and PPC (POWER8) has 128-bit atomics in 64-bit mode, but lacks 64-bit atomics
in 32-bit mode.

FWIW, OpenRISC also lacks double-word (64-bit in 32-bit processors, 128-bit
in 64-bit processors) atomics.  Sad.

So if we want to keep 64-on-32 emulation, it might still make sense to restrict
it to ARMv7+ and x86 hosts.  But otherwise it might be indeed time to say 
goodbye...

Paolo