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[Qemu-devel] [PULL 07/36] misc: zynq-xadc: Fix off-by-one
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 07/36] misc: zynq-xadc: Fix off-by-one |
Date: |
Thu, 21 Jan 2016 14:56:00 +0000 |
From: Peter Crosthwaite <address@hidden>
This bounds check was off-by-one. Fix.
Reported-by: Paolo Bonzini <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/misc/zynq-xadc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/zynq-xadc.c b/hw/misc/zynq-xadc.c
index 1a32595..d160ff2 100644
--- a/hw/misc/zynq-xadc.c
+++ b/hw/misc/zynq-xadc.c
@@ -220,7 +220,7 @@ static void zynq_xadc_write(void *opaque, hwaddr offset,
uint64_t val,
break;
}
- if (xadc_reg > ZYNQ_XADC_NUM_ADC_REGS && xadc_cmd != CMD_NOP) {
+ if (xadc_reg >= ZYNQ_XADC_NUM_ADC_REGS && xadc_cmd != CMD_NOP) {
qemu_log_mask(LOG_GUEST_ERROR, "read/write op to invalid xadc "
"reg 0x%x\n", xadc_reg);
break;
--
1.9.1
- [Qemu-devel] [PULL 24/36] hw/arm/virt: Wire up memory region to CPUs explicitly, (continued)
- [Qemu-devel] [PULL 24/36] hw/arm/virt: Wire up memory region to CPUs explicitly, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 12/36] cpu: Add new asidx_from_attrs() method, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 16/36] exec.c: Use cpu_get_phys_page_attrs_debug, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 14/36] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 21/36] target-arm: Implement asidx_from_attrs, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 01/36] qdev: get_child_bus(): Use QOM lookup if available, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 19/36] qom/cpu: Add MemoryRegion property, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 25/36] hw/arm/virt: add secure memory region and UART, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 34/36] target-arm: Implement remaining illegal return event checks, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 10/36] exec-all.h: Document tlb_set_page_with_attrs, tlb_set_page, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 07/36] misc: zynq-xadc: Fix off-by-one,
Peter Maydell <=
- [Qemu-devel] [PULL 11/36] cpu: Add new get_phys_page_attrs_debug() method, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 15/36] exec.c: Add cpu_get_address_space(), Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 04/36] xilinx_spips: Separate the state struct into a header, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 09/36] exec.c: Allow target CPUs to define multiple AddressSpaces, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 02/36] m25p80.c: Add sst25wf080 SPI flash device, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 22/36] target-arm: Implement cpu_get_phys_page_attrs_debug, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 17/36] exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_write, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 13/36] cputlb.c: Use correct address space when looking up MemoryRegionSection, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 03/36] ssi: Move ssi.h into a separate directory, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 06/36] xlnx-ep108: Connect the SPI Flash, Peter Maydell, 2016/01/21