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[Qemu-devel] [PATCH v1 08/10] target-arm: Supress EPD for S2, EL2 and EL
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v1 08/10] target-arm: Supress EPD for S2, EL2 and EL3 translations |
Date: |
Thu, 3 Sep 2015 22:14:24 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Stage-2 translations, EL2 and EL3 regimes don't have the
EPD control.
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-arm/helper.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 66b3fed..a53d713 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6323,7 +6323,7 @@ static bool get_phys_addr_lpae(CPUARMState *env,
target_ulong address,
/* Read an LPAE long-descriptor translation table. */
MMUFaultType fault_type = translation_fault;
uint32_t level = 1;
- uint32_t epd;
+ uint32_t epd = 0;
int32_t tsz;
uint32_t tg;
uint64_t ttbr;
@@ -6420,7 +6420,9 @@ static bool get_phys_addr_lpae(CPUARMState *env,
target_ulong address,
*/
if (ttbr_select == 0) {
ttbr = regime_ttbr(env, mmu_idx, 0);
- epd = extract32(tcr->raw_tcr, 7, 1);
+ if (el < 2 && mmu_idx != ARMMMUIdx_S2NS) {
+ epd = extract32(tcr->raw_tcr, 7, 1);
+ }
tsz = t0sz;
tg = extract32(tcr->raw_tcr, 14, 2);
--
1.9.1
- [Qemu-devel] [PATCH v1 05/10] target-arm: Add VTTBR_EL2, (continued)
[Qemu-devel] [PATCH v1 08/10] target-arm: Supress EPD for S2, EL2 and EL3 translations,
Edgar E. Iglesias <=
[Qemu-devel] [PATCH v1 09/10] target-arm: Add VPIDR_EL2, Edgar E. Iglesias, 2015/09/03
[Qemu-devel] [PATCH v1 10/10] target-arm: Add VMPIDR_EL2, Edgar E. Iglesias, 2015/09/03
Re: [Qemu-devel] [PATCH v1 00/10] arm: Steps towards EL2 support round 4, Peter Maydell, 2015/09/08