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Re: [Qemu-devel] [PATCH 3/3] arm_gic: Do not force PPIs to edge-triggere
From: |
Christoffer Dall |
Subject: |
Re: [Qemu-devel] [PATCH 3/3] arm_gic: Do not force PPIs to edge-triggered mode |
Date: |
Mon, 18 Aug 2014 15:01:22 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Mon, Aug 18, 2014 at 02:52:47PM +0200, Adam Lackorzynski wrote:
> On Mon Aug 18, 2014 at 14:48:15 +0200, Christoffer Dall wrote:
> > On Sat, Aug 16, 2014 at 09:48:21PM +0200, Adam Lackorzynski wrote:
> > > Only SGIs must be WI, done by forcing them to their default
> > > (edge-triggered).
> > >
> > > Signed-off-by: Adam Lackorzynski <address@hidden>
> > > ---
> > > hw/intc/arm_gic.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> > > index e546647..55019c9 100644
> > > --- a/hw/intc/arm_gic.c
> > > +++ b/hw/intc/arm_gic.c
> > > @@ -558,7 +558,7 @@ static void gic_dist_writeb(void *opaque, hwaddr
> > > offset,
> > > irq = (offset - 0xc00) * 4 + GIC_BASE_IRQ;
> > > if (irq >= s->num_irq)
> > > goto bad_reg;
> > > - if (irq < GIC_INTERNAL)
> > > + if (irq < GIC_NR_SGIS)
> > > value |= 0xaa;
> > > for (i = 0; i < 4; i++) {
> > > if (s->revision == REV_11MPCORE || s->revision == REV_NVIC) {
> > > --
> > > 2.1.0.rc1
> > >
> >
> > where do we ensure that the SGIs are actually configured as
> > edge-triggered when creating the gic?
>
> It's setup in arm_gic_common_reset() in arm_gic_common.c.
> (Looks like I should add another change to use GIC_NR_SGIS there too.)
>
That would be good, for this patch:
Acked-by: Christoffer Dall <address@hidden>
Thanks!
[Qemu-devel] [PATCH 2/3] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs, Adam Lackorzynski, 2014/08/16