[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 11/21] target-mips: Status.UX/SX/KX enable 32-bi
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 11/21] target-mips: Status.UX/SX/KX enable 32-bit address wrapping |
Date: |
Fri, 30 May 2014 10:01:33 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 05/30/2014 07:47 AM, Leon Alrae wrote:
> - if (env->CP0_Status & (1 << CP0St_UX)) {
> - env->hflags |= MIPS_HFLAG_UX;
> +
> + if ((((env->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) &&
> + (env->CP0_Status & (1 << CP0St_UX))) ||
> + (((env->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_SM) &&
> + (env->CP0_Status & (1 << CP0St_SX))) ||
> + (((env->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_KM) &&
> + (env->CP0_Status & (1 << CP0St_KX)))) {
> + env->hflags |= MIPS_HFLAG_X;
> }
> #endif
> if ((env->CP0_Status & (1 << CP0St_CU0)) ||
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 2e94375..6d294e1 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -1373,17 +1373,27 @@ generate_exception (DisasContext *ctx, int excp)
> gen_helper_0e0i(raise_exception, excp);
> }
>
> +#if defined(TARGET_MIPS64)
> +static inline int is_wrapping_needed(DisasContext *ctx)
> +{
> + if (!(ctx->hflags & MIPS_HFLAG_X)) {
> + /* If not R6 then wrap only in User Mode */
> + if ((ctx->insn_flags & ISA_MIPS64R6) ||
> + ((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM)) {
This check should go above, where you set HFLAG_X.
r~
- Re: [Qemu-devel] [PATCH 03/21] target-mips: add SELEQZ and SELNEZ instructions, (continued)
- [Qemu-devel] [PATCH 05/21] target-mips: extract decode_opc_special* from decode_opc, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 08/21] target-mips: move PREF, CACHE, LLD and SCD instructions, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 06/21] target-mips: split decode_opc_special* into *_r6 and *_legacy, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 07/21] target-mips: signal RI Exception on DSP and Loongson instructions, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 11/21] target-mips: Status.UX/SX/KX enable 32-bit address wrapping, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 10/21] target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 09/21] target-mips: redefine Integer Multiply and Divide instructions, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 12/21] target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 18/21] target-mips: do not allow Status.FR=0 mode in 64-bit FPU, Leon Alrae, 2014/05/30
- [Qemu-devel] [PATCH 13/21] target-mips: add Compact Branches, Leon Alrae, 2014/05/30