Re: [Qemu-devel] [PATCH 03/21] target-mips: add SELEQZ and SELNEZ instructions

[Richard Henderson]

On 05/30/2014 07:47 AM, Leon Alrae wrote:
> +    case OPC_SELNEZ:
> +        tcg_gen_movcond_tl(TCG_COND_EQ, cpu_gpr[rd], t0, t1, t1, t2);
> +        opn = "selnez";
> +        break;

I find it easier to reason about these things with conditions that match the
instruction.  For instance, SELNEZ is "select if not equal zero", therefore I
expect to find a "not equal zero" in the implementation.

Thus I think

  tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rd], t0, t1, t2, t1);

is a better way to write this, even though the two forms are functionally
identical.


r~