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[Qemu-devel] [PATCH 09/20] target-i386: tweak handling of PG_NX_MASK
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 09/20] target-i386: tweak handling of PG_NX_MASK |
Date: |
Tue, 27 May 2014 15:23:07 +0200 |
Remove the tail of the PAE case, so that we can use "goto" in the
next patch to jump to the protection checks.
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index eae3e7e..1460a23 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -657,8 +657,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
ptep &= pte ^ PG_NX_MASK;
page_size = 4096;
}
-
- ptep ^= PG_NX_MASK;
} else {
uint32_t pde;
@@ -670,10 +668,11 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
error_code = 0;
goto do_fault;
}
+ ptep = pde | PG_NX_MASK;
+
/* if PSE bit is set, then we use a 4MB page */
if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
page_size = 4096 * 1024;
- ptep = pde;
pte_addr = pde_addr;
pte = pde;
} else {
@@ -691,11 +690,12 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
goto do_fault;
}
/* combine pde and pte user and rw protections */
- ptep = pte & pde;
+ ptep &= pte | PG_NX_MASK;
page_size = 4096;
}
}
+ ptep ^= PG_NX_MASK;
if ((ptep & PG_NX_MASK) && is_write1 == 2) {
goto do_fault_protect;
}
--
1.8.3.1
- [Qemu-devel] [PATCH 00/20] target-i386: clean up and fix x86_cpu_handle_mmu_fault, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 02/20] target-i386: move check_io helpers to seg_helper.c, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 03/20] target-i386: fix kernel accesses with SMAP and CPL = 3, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 04/20] target-i386: simplify SMAP handling in MMU_KSMAP_IDX, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 01/20] target-i386: rename KSMAP to KNOSMAP, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 05/20] target-i386: fix coding standards in x86_cpu_handle_mmu_fault, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 06/20] target-i386: commonize checks for 2MB and 4KB pages, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 07/20] target-i386: commonize checks for 4MB and 4KB pages, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 08/20] target-i386: commonize checks for PAE and non-PAE, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 10/20] target-i386: introduce do_check_protect label, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 09/20] target-i386: tweak handling of PG_NX_MASK,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 12/20] target-i386: set correct error code for reserved bit access, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 13/20] target-i386: test reserved PS bit on PML4Es, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 11/20] target-i386: introduce support for 1 GB pages, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 14/20] target-i386: raise page fault for reserved physical address bits, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 15/20] target-i386: simplify pte/vaddr calculation, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 16/20] target-i386: unify reserved bits and NX bit check, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 17/20] target-i386: raise page fault for reserved bits in large pages, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 18/20] target-i386: support long addresses for 4MB pages (PSE-36), Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 19/20] target-i386: fix protection bits in the TLB for SMEP, Paolo Bonzini, 2014/05/27
- [Qemu-devel] [PATCH 20/20] target-i386: cleanup x86_cpu_get_phys_page_debug, Paolo Bonzini, 2014/05/27