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[Qemu-devel] [PULL 24/52] .travis.yml: Add aarch64-* targets
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 24/52] .travis.yml: Add aarch64-* targets |
Date: |
Mon, 6 Jan 2014 11:30:29 +0000 |
From: Alex Bennée <address@hidden>
Now the AArch64 targets are in mainline we can include them in our
Travis test matrix.
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index 90f1676..c7ff4da 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -16,6 +16,7 @@ env:
matrix:
- TARGETS=alpha-softmmu,alpha-linux-user
- TARGETS=arm-softmmu,arm-linux-user
+ - TARGETS=aarch64-softmmu,aarch64-linux-user
- TARGETS=cris-softmmu
- TARGETS=i386-softmmu,x86_64-softmmu
- TARGETS=lm32-softmmu
--
1.8.5
- [Qemu-devel] [PULL 34/52] target-arm: A64: Add support for floating point cond select, (continued)
- [Qemu-devel] [PULL 34/52] target-arm: A64: Add support for floating point cond select, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 33/52] target-arm: A64: Add support for floating point conditional compare, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 45/52] char/cadence_uart: Delete redundant rx rst logic, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 31/52] target-arm: A64: Add fmov (scalar, immediate) instruction, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 42/52] char/cadence_uart: Remove TX timer & add TX FIFO state, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 30/52] target-arm: A64: Add "Floating-point data-processing (3 source)" insns, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 26/52] target-arm: A64: Add support for dumping AArch64 VFP register state, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 28/52] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 27/52] target-arm: A64: Fix vector register access on bigendian hosts, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 32/52] target-arm: A64: Add support for floating point compare, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 24/52] .travis.yml: Add aarch64-* targets,
Peter Maydell <=
- [Qemu-devel] [PULL 25/52] default-configs: Add config for aarch64-linux-user, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 21/52] target-arm: A64: support for ld/st/cl exclusive, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 08/52] target-arm: A64: implement SVC, BRK, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 19/52] target-arm: aarch64: add support for ld lit, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 07/52] target-arm: A64: add support for 3 src data proc insns, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 29/52] target-arm: A64: Add "Floating-point data-processing (2 source)" insns, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 20/52] target-arm: Widen exclusive-access support struct fields to 64 bits, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 03/52] target-arm: A64: add support for ld/st with reg offset, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 04/52] target-arm: A64: add support for ld/st with index, Peter Maydell, 2014/01/06
- [Qemu-devel] [PULL 09/52] target-arm: A64: Add decoder skeleton for FP instructions, Peter Maydell, 2014/01/06