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[Qemu-devel] [PATCH v3 17/29] tcg-aarch64: Support muluh, mulsh
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v3 17/29] tcg-aarch64: Support muluh, mulsh |
Date: |
Mon, 2 Sep 2013 10:54:51 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.c | 12 ++++++++++++
tcg/aarch64/tcg-target.h | 4 ++--
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 0587765..5ab0596 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -295,6 +295,8 @@ typedef enum {
INSN_LSRV = 0x1ac02400,
INSN_ASRV = 0x1ac02800,
INSN_RORV = 0x1ac02c00,
+ INSN_SMULH = 0x9b407c00,
+ INSN_UMULH = 0x9bc07c00,
/* Bitfield instructions */
INSN_BFM = 0x33000000,
@@ -1576,6 +1578,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
args[5], const_args[4], const_args[5], c2);
break;
+ case INDEX_op_muluh_i64:
+ tcg_fmt_Rdnm(s, INSN_UMULH, 1, a0, a1, a2);
+ break;
+ case INDEX_op_mulsh_i64:
+ tcg_fmt_Rdnm(s, INSN_SMULH, 1, a0, a1, a2);
+ break;
+
case INDEX_op_mov_i64:
case INDEX_op_mov_i32:
case INDEX_op_movi_i64:
@@ -1703,6 +1712,9 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
{ INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rwA", "rwMZ" } },
{ INDEX_op_sub2_i64, { "r", "r", "rZ", "rZ", "rA", "rMZ" } },
+ { INDEX_op_muluh_i64, { "r", "r", "r" } },
+ { INDEX_op_mulsh_i64, { "r", "r", "r" } },
+
{ -1 },
};
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 05e43e4..8fd6771 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -89,8 +89,8 @@ typedef enum {
#define TCG_TARGET_HAS_sub2_i64 1
#define TCG_TARGET_HAS_mulu2_i64 0
#define TCG_TARGET_HAS_muls2_i64 0
-#define TCG_TARGET_HAS_muluh_i64 0
-#define TCG_TARGET_HAS_mulsh_i64 0
+#define TCG_TARGET_HAS_muluh_i64 1
+#define TCG_TARGET_HAS_mulsh_i64 1
enum {
TCG_AREG0 = TCG_REG_X19,
--
1.8.3.1
- [Qemu-devel] [PATCH v3 08/29] tcg-aarch64: Introduce tcg_fmt_Rdn_aimm, (continued)
- [Qemu-devel] [PATCH v3 08/29] tcg-aarch64: Introduce tcg_fmt_Rdn_aimm, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 09/29] tcg-aarch64: Implement mov with tcg_fmt_* functions, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 10/29] tcg-aarch64: Handle constant operands to add, sub, and compare, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 11/29] tcg-aarch64: Handle constant operands to and, or, xor, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 13/29] tcg-aarch64: Handle zero as first argument to sub, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 12/29] tcg-aarch64: Support andc, orc, eqv, not, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 15/29] tcg-aarch64: Support deposit, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 14/29] tcg-aarch64: Support movcond, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 16/29] tcg-aarch64: Support add2, sub2, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 17/29] tcg-aarch64: Support muluh, mulsh,
Richard Henderson <=
- [Qemu-devel] [PATCH v3 18/29] tcg-aarch64: Support div, rem, Richard Henderson, 2013/09/02
- [Qemu-devel] [PATCH v3 19/29] tcg-aarch64: Introduce tcg_fmt_Rd_uimm_s, Richard Henderson, 2013/09/02
[Qemu-devel] [PATCH v3 20/29] tcg-aarch64: Improve tcg_out_movi, Richard Henderson, 2013/09/02
[Qemu-devel] [PATCH v3 21/29] tcg-aarch64: Avoid add with zero in tlb load, Richard Henderson, 2013/09/02
[Qemu-devel] [PATCH v3 23/29] tcg-aarch64: Pass return address to load/store helpers directly., Richard Henderson, 2013/09/02
[Qemu-devel] [PATCH v3 22/29] tcg-aarch64: Use adrp in tcg_out_movi, Richard Henderson, 2013/09/02
[Qemu-devel] [PATCH v3 24/29] tcg-aarch64: Use tcg_out_call for qemu_ld/st, Richard Henderson, 2013/09/02