[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 0/5] Xilinx Intc Fixes
From: |
peter . crosthwaite |
Subject: |
[Qemu-devel] [PATCH v2 0/5] Xilinx Intc Fixes |
Date: |
Tue, 11 Jun 2013 10:56:55 +1000 |
From: Peter Crosthwaite <address@hidden>
Various fixups to the Xilinx Interrupt controller following a review
against TRM and RTL descriptions.
Tested as working for microblaze and microblazeel Linux.
change from v1:
Fixed S3ADSP UART interrupt - done first for bisectability
(Now tested as working on s3asdsp design)
Peter Crosthwaite (5):
microblaze/petalogix_s3adsp1800_mmu: Fix UART IRQ
intc/xilinx_intc: Don't clear level sens. IRQs without ACK
intc/xilinx_intc: Handle level interrupt retriggering
intc/xilinx_intc: Inhibit write to ISR when HIE
intc/xilinx_intc: Dont lower IRQ when HIE cleared
hw/intc/xilinx_intc.c | 28 ++++++++++++++++++----------
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
2 files changed, 19 insertions(+), 11 deletions(-)
--
1.8.3.rc1.44.gb387c77.dirty
- [Qemu-devel] [PATCH v2 0/5] Xilinx Intc Fixes,
peter . crosthwaite <=
- [Qemu-devel] [PATCH v2 1/5] microblaze/petalogix_s3adsp1800_mmu: Fix UART IRQ, peter . crosthwaite, 2013/06/10
- [Qemu-devel] [PATCH v2 2/5] intc/xilinx_intc: Don't clear level sens. IRQs without ACK, peter . crosthwaite, 2013/06/10
- [Qemu-devel] [PATCH v2 3/5] intc/xilinx_intc: Handle level interrupt retriggering, peter . crosthwaite, 2013/06/10
- [Qemu-devel] [PATCH v2 4/5] intc/xilinx_intc: Inhibit write to ISR when HIE, peter . crosthwaite, 2013/06/10
- [Qemu-devel] [PATCH v2 5/5] intc/xilinx_intc: Dont lower IRQ when HIE cleared, peter . crosthwaite, 2013/06/10
- Re: [Qemu-devel] [PATCH v2 0/5] Xilinx Intc Fixes, Edgar E. Iglesias, 2013/06/18