Re: [Qemu-devel] [PATCH v3] PIIX3: reset the VM when the Reset Control Register's RCPU bit gets set

[Michael S. Tsirkin]

On Tue, Feb 19, 2013 at 03:57:19PM +0100, Laszlo Ersek wrote:
> On 02/19/13 13:46, Paolo Bonzini wrote:
> > Il 24/01/2013 10:31, Laszlo Ersek ha scritto:
> >> From <http://mjg59.dreamwidth.org/3561.html>:
> >>
> >>   Traditional PCI config space access is achieved by writing a 32 bit
> >>   value to io port 0xcf8 to identify the bus, device, function and config
> >>   register. Port 0xcfc then contains the register in question. But if you
> >>   write the appropriate pair of magic values to 0xcf9, the machine will
> >>   reboot. Spectacular! And not standardised in any way (certainly not part
> >>   of the PCI spec), so different chipsets may have different requirements.
> >>   Booo.
> >>
> >> In the PIIX3 spec, IO port 0xcf9 is specified as the Reset Control
> >> Register. Bit 1 (System Reset, SRST) would normally differentiate between
> >> soft reset and hard reset, but we ignore the difference beyond allowing
> >> the guest to read it back.
> > 
> > Could you implement it for lpc_ich9.c too?
> 
> Yes, I'd like to try, but...
> 
> > 
> > You can find it in the ICH9 spec on page 486
> > (http://www.intel.com/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf).
> 
> (Thanks for the link. Interestingly, "wget" got "403 Forbidden". I
> googled the filename and then found it under the exact same URL. Intel's
> webserver probably insists on a cookie or some Referer.)
> 
> ... earlier Michael pointed out to me that a shared handler for the
> [0xcf8, 0xcfc) range would be preferred over the overlapping regions.
> (Which makes me recall my RFC version of the patch.) Since RST_CNT on
> the ICH9 is also at 0xcf9, I assume I should fix up the PIIX3 first and
> then follow the PIIX3 impl. in ICH9.
> 
> I could even attempt adding the "hard reset out" thing you mention in
> <http://thread.gmane.org/gmane.comp.emulators.qemu/195351/focus=195358>.
> (Full emulation of PCIRST# seems "slightly" complex... :))
> 
> Michael, what do you think? :)
> 
> Thanks
> Laszlo

Yes I think it's the cleanest way to do this.
Though, it was Blue Swirl that pushed for the separate handlers right?
I'm not too picky, separate handlers seem to work ATM
even though I think it's more a bug than a feature.

-- 
MST