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[Qemu-devel] [PATCH 23/36] arm: save always 32 fpu registers
From: |
Juan Quintela |
Subject: |
[Qemu-devel] [PATCH 23/36] arm: save always 32 fpu registers |
Date: |
Mon, 19 Mar 2012 23:57:51 +0100 |
This way, we fix a bug (we were overwritten the 16 first registers on
load), and we don't need to check for ARM_FEATUR_VPF3, we always send
the 32 registers.
Signed-off-by: Juan Quintela <address@hidden>
---
target-arm/cpu.h | 2 +-
target-arm/machine.c | 22 ++--------------------
2 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 26c114b..a6e8c7e 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -455,7 +455,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_list arm_cpu_list
-#define CPU_SAVE_VERSION 6
+#define CPU_SAVE_VERSION 7
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
diff --git a/target-arm/machine.c b/target-arm/machine.c
index f66b8df..9c0f773 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -64,7 +64,7 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_be32(f, env->features);
if (arm_feature(env, ARM_FEATURE_VFP)) {
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < 32; i++) {
CPU_DoubleU u;
u.d = env->vfp.regs[i];
qemu_put_be32(f, u.l.upper);
@@ -77,15 +77,6 @@ void cpu_save(QEMUFile *f, void *opaque)
/* TODO: Should use proper FPSCR access functions. */
qemu_put_be32(f, env->vfp.vec_len);
qemu_put_be32(f, env->vfp.vec_stride);
-
- if (arm_feature(env, ARM_FEATURE_VFP3)) {
- for (i = 16; i < 32; i++) {
- CPU_DoubleU u;
- u.d = env->vfp.regs[i];
- qemu_put_be32(f, u.l.upper);
- qemu_put_be32(f, u.l.lower);
- }
- }
}
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
@@ -182,7 +173,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
env->features = qemu_get_be32(f);
if (arm_feature(env, ARM_FEATURE_VFP)) {
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < 32; i++) {
CPU_DoubleU u;
u.l.upper = qemu_get_be32(f);
u.l.lower = qemu_get_be32(f);
@@ -195,15 +186,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
/* TODO: Should use proper FPSCR access functions. */
env->vfp.vec_len = qemu_get_be32(f);
env->vfp.vec_stride = qemu_get_be32(f);
-
- if (arm_feature(env, ARM_FEATURE_VFP3)) {
- for (i = 16; i < 32; i++) {
- CPU_DoubleU u;
- u.l.upper = qemu_get_be32(f);
- u.l.lower = qemu_get_be32(f);
- env->vfp.regs[i] = u.d;
- }
- }
}
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
--
1.7.7.6
- [Qemu-devel] [PATCH 22/36] vmstate: port mips cpu, (continued)
- [Qemu-devel] [PATCH 22/36] vmstate: port mips cpu, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 21/36] mips: bump migration version to 4, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 31/36] vmstate: Add copyright info for cris processor, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 10/36] vmstate: introduce float64 arrays, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 05/36] vmstate: use new style for lm32 cpus, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 28/36] vmstate: rename machine.c to vmstate-cpu.c, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 29/36] vmstate: Add copyright info for alpha processor, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 09/36] vmstate: introduce float32 arrays, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 23/36] arm: save always 32 fpu registers,
Juan Quintela <=
- [Qemu-devel] [PATCH 25/36] vmstate: all cpus converted, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 17/36] vmstate: make incompatible change for sparc, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 34/36] vmstate: Add copyright info for mips processor, Juan Quintela, 2012/03/19
- [Qemu-devel] [PATCH 24/36] vmstate: port arm cpu, Juan Quintela, 2012/03/19