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Re: [Qemu-devel] [PATCH 09/26] target-xtensa: add special and user regis
From: |
Max Filippov |
Subject: |
Re: [Qemu-devel] [PATCH 09/26] target-xtensa: add special and user registers |
Date: |
Fri, 20 May 2011 11:34:00 +0400 |
User-agent: |
KMail/1.13.6 (Linux/2.6.34.8-68.fc13.x86_64; KDE/4.5.5; x86_64; ; ) |
> > +enum {
> > + THREADPTR = 231,
> > + FCR = 232,
> > + FSR = 233,
> > +};
> > +
> > typedef struct XtensaConfig {
> > const char *name;
> > uint64_t options;
> > @@ -109,6 +115,7 @@ typedef struct CPUXtensaState {
> > uint32_t regs[16];
> > uint32_t pc;
> > uint32_t sregs[256];
> > + uint32_t uregs[256];
>
> Is it really worthwhile allocating 2k worth of space in the
> CPUState when only several of the slots are actually used?
>
> I would think that it might be better to have a function to
> map between number to offset/register. E.g.
>
> int ur_offset(int ur)
> {
> switch (ur) {
> case THREADPTR:
> return offsetof(CPUState, ur_threadptr);
> case FCR:
> return offsetof(CPUState, ur_fcr);
> case FSR:
> return offsetof(CPUState, ur_fsr);
> }
> return -1;
> }
>
> where the individual slots are allocated by hand in the
> CPUState. The fact that they'll be named in the struct
> will also make it easier to dump the value inside gdb and
> see what the individual values are.
User registers represent TIE states that may appear in custom xtensa
configurations. I'd better change RUR and WUR so that they can access all user
registers but warn on those not defined globally or in the CPUEnv::config.
Is it OK?
Thanks.
-- Max
- [Qemu-devel] [PATCH 01/26] target-xtensa: add target stubs, (continued)
- [Qemu-devel] [PATCH 01/26] target-xtensa: add target stubs, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 02/26] target-xtensa: add target to the configure script, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 03/26] target-xtensa: implement disas_xtensa_insn, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 04/26] target-xtensa: implement narrow instructions, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 05/26] target-xtensa: implement RT0 group, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 06/26] target-xtensa: add sample board, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 07/26] target-xtensa: implement conditional jumps, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 08/26] target-xtensa: implement JX/RET0/CALLX, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 09/26] target-xtensa: add special and user registers, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 10/26] target-xtensa: implement RST3 group, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 11/26] target-xtensa: implement shifts (ST1 and RST1 groups), Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 12/26] target-xtensa: implement LSAI group, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 13/26] target-xtensa: mark reserved and TBD opcodes, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 14/26] target-xtensa: implement SYNC group, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 15/26] target-xtensa: implement CACHE group, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 16/26] target-xtensa: implement exceptions, Max Filippov, 2011/05/17
- [Qemu-devel] [PATCH 17/26] target-xtensa: implement RST2 group (32 bit mul/div/rem), Max Filippov, 2011/05/17