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[Qemu-devel] [RFC 09/28] target-xtensa: implement JX/RET0/CALLX
From: |
Max Filippov |
Subject: |
[Qemu-devel] [RFC 09/28] target-xtensa: implement JX/RET0/CALLX |
Date: |
Wed, 4 May 2011 04:59:09 +0400 |
Group SNM0 (indirect jumps and calls).
Signed-off-by: Max Filippov <address@hidden>
---
target-xtensa/translate.c | 49 ++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 48 insertions(+), 1 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 2bfa801..f4d74e0 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -130,7 +130,11 @@ static void disas_xtensa_insn(DisasContext *dc)
#define CALL_OFFSET ((((_b0) & 0x3) << 16) | ((_b1) << 8) | (_b2))
#define CALL_OFFSET_SE (((_b0 & 0x2) ? 0xfffc0000 : 0) | CALL_OFFSET)
-#define BRI12_M ((_b0) & 0x3)
+#define CALLX_N CALL_N
+#define CALLX_M ((_b0) & 0x3)
+#define CALLX_S RRR_S
+
+#define BRI12_M CALLX_M
#define BRI12_S RRR_S
#define BRI12_IMM12 ((((_b1) & 0xf) << 8) | (_b2))
#define BRI12_IMM12_SE ((((_b1) & 0x8) ? 0xfffff000 : 0) | BRI12_IMM12)
@@ -165,6 +169,49 @@ static void disas_xtensa_insn(DisasContext *dc)
switch (RRR_R) {
case 0: /*SNM0*/
+ switch (CALLX_M) {
+ case 0: /*ILL*/
+ break;
+
+ case 1: /*reserved*/
+ break;
+
+ case 2: /*JR*/
+ switch (CALLX_N) {
+ case 0: /*RET*/
+ case 2: /*JX*/
+ gen_jump(dc, cpu_R[CALLX_S]);
+ break;
+
+ case 1: /*RETWw*/
+ HAS_OPTION(XTENSA_OPTION_WINDOWED_REGISTER);
+ break;
+
+ case 3: /*reserved*/
+ break;
+ }
+ break;
+
+ case 3: /*CALLX*/
+ switch (CALLX_N) {
+ case 0: /*CALLX0*/
+ {
+ TCGv_i32 tmp = tcg_temp_new_i32();
+ tcg_gen_mov_i32(tmp, cpu_R[CALLX_S]);
+ tcg_gen_movi_i32(cpu_R[0], dc->pc + 3);
+ gen_jump(dc, tmp);
+ tcg_temp_free(tmp);
+ }
+ break;
+
+ case 1: /*CALLX4w*/
+ case 2: /*CALLX8w*/
+ case 3: /*CALLX12w*/
+ HAS_OPTION(XTENSA_OPTION_WINDOWED_REGISTER);
+ break;
+ }
+ break;
+ }
break;
case 1: /*MOVSPw*/
--
1.7.3.4
- [Qemu-devel] [RFC 01/28] target-xtensa: add target stubs, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 02/28] target-xtensa: add target to the configure script, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 03/28] target-xtensa: implement disas_xtensa_insn, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 04/28] target-xtensa: implement narrow instructions, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 05/28] target-xtensa: implement RT0 group, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 06/28] target-xtensa: add sample board, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 07/28] target-xtensa: add gdb support, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 08/28] target-xtensa: implement conditional jumps, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 09/28] target-xtensa: implement JX/RET0/CALLX,
Max Filippov <=
- [Qemu-devel] [RFC 10/28] target-xtensa: add special and user registers, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 11/28] target-xtensa: implement RST3 group, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 12/28] target-xtensa: implement shifts (ST1 and RST1 groups), Max Filippov, 2011/05/03
[Qemu-devel] [RFC 13/28] target-xtensa: implement LSAI group, Max Filippov, 2011/05/03
[Qemu-devel] [RFC 14/28] target-xtensa: mark reserved and TBD opcodes, Max Filippov, 2011/05/03