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Re: [Qemu-devel] [PATCH] arm-dis: Include opcode hex when doing disassem


From: Aurelien Jarno
Subject: Re: [Qemu-devel] [PATCH] arm-dis: Include opcode hex when doing disassembly
Date: Mon, 10 Jan 2011 18:31:55 +0100
User-agent: Mutt/1.5.18 (2008-05-17)

On Mon, Jan 10, 2011 at 11:09:28AM -0600, Peter Maydell wrote:
> On 10 January 2011 10:49, Aurelien Jarno <address@hidden> wrote:
> > Strangely on arm host, the opcode hex is already included, as shown
> > below:
> >
> > | OUT: [size=308]
> > | 0x01001ec0:  e5974004  ldr      r4, [r7, #4]
> > | 0x01001ec4:  e1a04804  lsl      r4, r4, #16
> > | 0x01001ec8:  e1a04824  lsr      r4, r4, #16
> > | 0x01001ecc:  e1a04404  lsl      r4, r4, #8
> >
> > Maybe there is just an option to enable to allow that?
> 
> It looks like that's just an ugly #ifdef in disas.c:disas():
> #ifdef __arm__
>         /* since data is included in the code, it is better to
>            display code data too */
>         fprintf(out, "%08x  ", (int)bfd_getl32((const bfd_byte *)pc));
> #endif
> 
> ...so I guess if we commit the patch I submitted we should
> just delete that #ifdef.
> 

Agreed.


-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net



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