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[Qemu-devel] [PATCH] arm-dis: Include opcode hex when doing disassembly


From: Peter Maydell
Subject: [Qemu-devel] [PATCH] arm-dis: Include opcode hex when doing disassembly
Date: Mon, 10 Jan 2011 16:16:26 +0000

Enhance the ARM disassembler used for debugging so that it includes
the hex dump of the opcode as well as the symbolic disassembly.

Signed-off-by: Peter Maydell <address@hidden>
---
This is based on meego-qemu commit e548a60c with a change suggested
last time that patch was sent to qemu-devel:
http://www.mail-archive.com/address@hidden/msg28258.html
http://www.mail-archive.com/address@hidden/msg29235.html
    
I have used GNU-style indent conventions in this change because
the rest of this file consistently does so (being from libopcode
originally).

 arm-dis.c |   24 ++++++++++++++++++++++++
 1 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/arm-dis.c b/arm-dis.c
index af21739..3ece02c 100644
--- a/arm-dis.c
+++ b/arm-dis.c
@@ -4101,6 +4101,30 @@ print_insn_arm (bfd_vma pc, struct disassemble_info 
*info)
        addresses, since the addend is not currently pc-relative.  */
     pc = 0;
 
+  /* We include the hexdump of the instruction. The format here
+     matches that used by objdump and the ARM ARM (in particular,
+     32 bit Thumb instructions are displayed as pairs of halfwords,
+     not as a single word.)  */
+  if (is_thumb)
+    {
+      if (size == 2)
+       {
+         info->fprintf_func(info->stream, "%04lx       ",
+                            ((unsigned long)given) & 0xffff);
+       }
+      else
+       {
+         info->fprintf_func(info->stream, "%04lx %04lx  ",
+                            (((unsigned long)given) >> 16) & 0xffff,
+                            ((unsigned long)given) & 0xffff);
+       }
+    }
+  else
+    {
+      info->fprintf_func(info->stream, "%08lx      ",
+                        ((unsigned long)given) & 0xffffffff);
+    }
+
   printer (pc, info, given);
 
   if (is_thumb)
-- 
1.7.1




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