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Re: [Qemu-devel] PXA27x processor support (XScale)
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] PXA27x processor support (XScale) |
Date: |
Wed, 07 Feb 2007 11:34:01 +0100 |
User-agent: |
IceDove 1.5.0.9 (X11/20061220) |
andrzej zaborowski a écrit :
> Hi,
> for anybody interested I uploaded a patch containing support for
> Intel's PXA270 processor emulation for qemu. The patch is against
> current CVS (or 0.9.0) and you can find it at
>
> http://www.zabor.org/balrog/qemu-pxa270-and-more.patch
>
> (450 kB). PXA is a series of embedded processors used in PDAs, mobile
> phones and other devices. PXA is an ARM based system-on-chip. 27x is
> the newest out of the ones produced by Intel. PXA 25x and 260 devices
> can be emulated using the same code. Main additions are:
>
> - On-chip peripherals: DMA, interrupt controller, GPIOs, sysem
> timers, memory manager, clocks manager, power manager, LCD controller,
> PCMCIA cards controller, MMC/SD host controller, I2C device, USB host
> (OHCI), I2S controller, SSP controller, UARTs, an RTC.
>
> - NAND memory emulation - should work for all chips supported by
> Linux given the ID of the chip to emulate (small or large page).
> - PCMCIA bus with hotplugging (added "info pcmcia" command for
> listing sockets and inserted cards).
> - an IBM/hitachi microdrive, reuses existing IDE code adding the
> CF-ATA command set.
> - ADS7846 touchscreen controller from Texas Instruments (used in maaany
> PDAs).
> - Wolfson WM8750 audio codec chip (I2C slave).
> - Maxim MAX1111 ADC chip.
> - Maxim MAX7310 gpio expander chip (I2C slave).
> - SD card emulator (unchanged from the omap support patch)
> - iwMMXt coprocessor support (untested).
> - some bugfixes.
>
> I'm posting this as is because I won't have time to make a final
> clean-up and I was asked for it by some persons who want to emulate
> pxa270 based devices. I also want to avoid duplicating code. One case
> of duplication is the I2C bus, there was a different I2C bus recently
> merged in qemu. Our implementation is slightly more detailed (as need
> by some I2C hosts) and does some buffering, but is 8-bit only.
> (hw/i2c.h should probably be made into a template that implements 8
> and 16 bit i2c included two time from vl.h).
I have quickly looked at your patch, it seems your implementation of the
I2C bus could be re-used for the Malta board. It uses a bit banging I2C
interface.
Thanks for your patch, I will have a closer look later.
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' address@hidden | address@hidden
`- people.debian.org/~aurel32 | www.aurel32.net