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Re: [Qemu-arm] [PATCH v3 03/30] imx_fec: Change queue flushing heuristic
From: |
Andrey Smirnov |
Subject: |
Re: [Qemu-arm] [PATCH v3 03/30] imx_fec: Change queue flushing heuristics |
Date: |
Wed, 22 Nov 2017 12:22:40 -0800 |
On Tue, Nov 21, 2017 at 9:27 AM, Peter Maydell <address@hidden> wrote:
> On 6 November 2017 at 15:47, Andrey Smirnov <address@hidden> wrote:
>> In current implementation, packet queue flushing logic seem to suffer
>> from a deadlock like scenario if a packet is received by the interface
>> before before Rx ring is initialized by Guest's driver. Consider the
>> following sequence of events:
>>
>> 1. A QEMU instance is started against a TAP device on Linux
>> host, running Linux guest, e. g., something to the effect
>> of:
>>
>> qemu-system-arm \
>> -net nic,model=imx.fec,netdev=lan0 \
>> netdev tap,id=lan0,ifname=tap0,script=no,downscript=no \
>> ... rest of the arguments ...
>>
>> 2. Once QEMU starts, but before guest reaches the point where
>> FEC deriver is done initializing the HW, Guest, via TAP
>> interface, receives a number of multicast MDNS packets from
>> Host (not necessarily true for every OS, but it happens at
>> least on Fedora 25)
>>
>> 3. Recieving a packet in such a state results in
>> imx_eth_can_receive() returning '0', which in turn causes
>> tap_send() to disable corresponding event (tap.c:203)
>>
>> 4. Once Guest's driver reaches the point where it is ready to
>> recieve packets it prepares Rx ring descriptors and writes
>> ENET_RDAR_RDAR to ENET_RDAR register to indicate to HW that
>> more descriptors are ready. And at this points emulation
>> layer does this:
>>
>> s->regs[index] = ENET_RDAR_RDAR;
>> imx_eth_enable_rx(s);
>>
>> which, combined with:
>>
>> if (!s->regs[ENET_RDAR]) {
>> qemu_flush_queued_packets(qemu_get_queue(s->nic));
>> }
>>
>> results in Rx queue never being flushed and corresponding
>> I/O event beign disabled.
>>
>> To prevent the problem, change the code to always flush packet queue
>> when ENET_RDAR transitions 0 -> ENET_RDAR_RDAR.
>>
>> Cc: Peter Maydell <address@hidden>
>> Cc: Jason Wang <address@hidden>
>> Cc: Philippe Mathieu-Daudé <address@hidden>
>> Cc: address@hidden
>> Cc: address@hidden
>> Cc: address@hidden
>> Signed-off-by: Andrey Smirnov <address@hidden>
>> diff --git a/include/hw/net/imx_fec.h b/include/hw/net/imx_fec.h
>> index 62ad473b05..4bc8f03ec2 100644
>> --- a/include/hw/net/imx_fec.h
>> +++ b/include/hw/net/imx_fec.h
>> @@ -252,6 +252,7 @@ typedef struct IMXFECState {
>> uint32_t phy_int_mask;
>>
>> bool is_fec;
>> + bool needs_flush;
>> } IMXFECState;
>
> This field isn't needed any more in this version of the patch, I think?
>
Yeah, my bad, forgot to remove this part. Will do in v4.
Thanks,
Andrey Smirnov
- [Qemu-arm] [PATCH v3 00/30] Initial i.MX7 support, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 03/30] imx_fec: Change queue flushing heuristics, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 05/30] imx_fec: Use MIN instead of explicit ternary operator, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 08/30] imx_fec: Use correct length for packet size, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 07/30] imx_fec: Add support for multiple Tx DMA rings, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 06/30] imx_fec: Emulate SHIFT16 in ENETx_RACC, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 10/30] imx_fec: Reserve full 4K page for the register file, Andrey Smirnov, 2017/11/06
- [Qemu-arm] [PATCH v3 11/30] sdhci: Add i.MX specific subtype of SDHCI, Andrey Smirnov, 2017/11/06