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[Openvortex-dev] Findings...


From: Manuel Jander
Subject: [Openvortex-dev] Findings...
Date: Thu, 30 Oct 2003 00:04:56 -0400

Hi,

For anyone wanting or being looking at the admaud30.sys disassembly (or
maybe not), I took some conclusion i would like to share:

The WaveTable or WT engine (I'm still not sure what WT stands for) is
divided in "blocks". Each block, independent of the card type has 0x20
voices (0x20 = 32).

Since the AU8820 has 32 WT voices, It has only one WT block.
The AU8830 has to WT blocks, that leads to 64 voices. The au8810 has no
WT blocks (cero WT voices). This turns evident in the AuWt_WriteReg()
function.

The WT engine channels seem to be used for rendering the "A3D
reflections". I think they just get setup on the same buffer as the
"main" A3D signal, but delayed a bit, to simulate the later arrival of
the sound.
Only the main A3D signal gets the HRTF positional characteristics
applied through the A3D blocks.

>From the product brochure PDF file of the AU8830 i know that the entire
WT engine has 64 + 6 output routes.
So i conclude that those WT voices can be routed in at least (maybe
more) different ways. One can route the individual channels or one can
route a (supposedly) down mixed signal of the entire block (useful for
WaveTable operation).

The routing base addresses (au8830) are 0x40 and 0x80. I observed that
the "MakeDefaultConnections" function (member of Asp4Topology) connects
addresses 0x60 and 0xa0 to the codec. First i though whats going on here
?!, but it semed suspicious to me that 0x40+0x20=0x60 and
0x80+0x20=0xa0. Those Adb routing addresses where just on top of the
0x20 Wt channels range for each block.

The Asp4SynthTopology Destructor makes some disconnections on routes
0x60-0x66 and 0xa0-0xa6, that are exactly the "+6" routes that i was
missing (if they meant 6 pairs; stereo routes).

Some things that still don't square is that if the WT channels can be
routed individually, we got a problem because there are only 32 mixer
inputs, barely enough for the 32 ADBDMA channels. But routing is done in
a dynamic fashion, so only the required ADB blocks are routed when
needed.
Maybe WT channels are used in some situation instead of "plain" ADB
channels, since the WT blocks seem to have some filter capabilities (?)

The WT engine uses a very large register set for ctrl and status
purposes. The use of those register is still to be discovered, but i
guess its better by snooping the driver instead of more disassembly.


The A3D blocks routing addresses are well identified, SampleRate Enable
registers too. Still can't say when it will be able to test something.


Best Regards






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