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Re: [Discuss-gnuradio] How to update FPGA in E100


From: yooxi
Subject: Re: [Discuss-gnuradio] How to update FPGA in E100
Date: Thu, 25 Aug 2011 15:30:07 -0700 (PDT)


Thanks, Josh!
Then we will find a Xilinx ISE and see what's the next step.

Yooxi



Josh Blum-3 wrote:
> 
> 
> 
> On 08/24/2011 09:30 PM, xi yang wrote:
>> Hi, all,
>> 
>> We have made a FPGA FFT module.
>> We downloaded the UHD source code from
>> https://github.com/EttusResearch/UHD-Mirror/archives/master
>> We modified the usrp_std.v under
>> fpga/usrp1/toplevel/usrp_std/
>> to link our FFT module between rx_buffer and USB.
>> We have successfully compiled the usrp_std.qpf in Quartus II 9.1.
>> How can we make it effective in our USRP E100?
> 
> You build images for the USRP1. That is a different product than E100.
> 
> Pre-built images are here:
> http://code.ettus.com/redmine/ettus/projects/uhd/wiki#Binary-downloads
> 
> Installation notes:
> http://ettus.dyndns.org/uhd_docs/manual/html/images.html#archive-install
> 
> The verilog source can be found here:
> http://code.ettus.com/redmine/ettus/projects/uhd/repository/revisions/master/show/fpga/usrp2/top/E1x0
> 
> -josh
> 
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> 

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