[Commit-gnuradio] r7212 - usrp2/trunk/fpga/opencores/aemb/rtl/verilog

[matt]

Author: matt
Date: 2007-12-17 00:18:47 -0700 (Mon, 17 Dec 2007)
New Revision: 7212

Modified:
   usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v
Log:
pass the parameters properly


Modified: usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v
===================================================================
--- usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v  2007-12-17 
07:15:21 UTC (rev 7211)
+++ usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v  2007-12-17 
07:18:47 UTC (rev 7212)
@@ -30,7 +30,7 @@
 
    assign  dwb_cyc_o = dwb_stb_o;
 
-   aeMB_edk32 #(.IW(ISIZ),.DW(DSIZ),.MUL(0),.BSF(0))
+   aeMB_edk32 #(.IW(ISIZ),.DW(DSIZ),.MUL(MUL),.BSF(BSF))
      aeMB_edk32 (.sys_clk_i(sys_clk_i), 
                 .sys_rst_i(sys_rst_i),