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[Commit-gnuradio] r7185 - in gnuradio/branches/developers/gnychis/inband


From: gnychis
Subject: [Commit-gnuradio] r7185 - in gnuradio/branches/developers/gnychis/inband/usrp/fpga: inband_lib toplevel/usrp_inband_usb
Date: Fri, 14 Dec 2007 16:47:25 -0700 (MST)

Author: gnychis
Date: 2007-12-14 16:47:25 -0700 (Fri, 14 Dec 2007)
New Revision: 7185

Modified:
   
gnuradio/branches/developers/gnychis/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
   
gnuradio/branches/developers/gnychis/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
Log:
Still work in progress on I&Q fix, currently at least getting 'I' still

down to 1 TX/RX to speed up build


Modified: 
gnuradio/branches/developers/gnychis/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
===================================================================
--- 
gnuradio/branches/developers/gnychis/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
 2007-12-14 22:10:30 UTC (rev 7184)
+++ 
gnuradio/branches/developers/gnychis/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
 2007-12-14 23:47:25 UTC (rev 7185)
@@ -62,11 +62,12 @@
     wire [11:0] rdusedw;
     wire [11:0] wrusedw;
        wire [15:0] fifodata;
+       wire [15:0] fifodata_il;
        reg [15:0] fifodata_16;
     wire WR;
     wire have_space;
 
-       assign fifodata = fifodata_16;
+       assign fifodata_il = fifodata_16;
 
     fifo_4kx16_dc      rx_usb_fifo (
             .aclr ( reset ),
@@ -141,24 +142,27 @@
                        store_next <= #1 4'd0;
                else if(rxstrobe & (store_next == 0))
                        store_next <= #1 4'd1;
-               else if(~rx_full & (store_next == channels))
+               else if(~rx_full & (store_next == (NUM_CHAN + NUM_CHAN)))
                        store_next <= #1 4'd0;
                else if(~rx_full & (store_next != 0))
                        store_next <= #1 store_next + 4'd1;
-                       
+
        always @*
-               case(store_next)
-                       4'd1 : fifodata_16 = ch_0;
-                       4'd2 : fifodata_16 = ch_1;
-                       4'd3 : fifodata_16 = ch_2;
-                       4'd4 : fifodata_16 = ch_3;
-                       4'd5 : fifodata_16 = ch_4;
-                       4'd6 : fifodata_16 = ch_5;
-                       4'd7 : fifodata_16 = ch_6;
-                       4'd8 : fifodata_16 = ch_7;
-                       default: fifodata_16 = 16'hFFFF;
-               endcase
+               fifodata_16 = ch_0;             
 
+//     always @*
+//             case(store_next)
+//                     4'd1 : fifodata_16 = ch_0;
+//                     4'd2 : fifodata_16 = ch_1;
+//                     4'd3 : fifodata_16 = ch_2;
+//                     4'd4 : fifodata_16 = ch_3;
+//                     4'd5 : fifodata_16 = ch_4;
+//                     4'd6 : fifodata_16 = ch_5;
+//                     4'd7 : fifodata_16 = ch_6;
+//                     4'd8 : fifodata_16 = ch_7;
+//                     default: fifodata_16 = 16'hFFFF;
+//             endcase
+
        wire [15:0] dataout [0:NUM_CHAN];
        wire [9:0]  usedw       [0:NUM_CHAN];
        wire empty[0:NUM_CHAN];
@@ -173,7 +177,7 @@
        fifo_1kx16 rx_chan_fifo (
                 .aclr ( reset ),
                 .clock ( rxclk ),
-                .data ( fifodata ),
+                .data ( fifodata_il ),
                 .rdreq ( rdreq ),
              .wrreq ( ~rx_full[i] & rxstrobe),
                 .empty (empty[i]),
@@ -202,7 +206,7 @@
        assign chan_empty[NUM_CHAN] = cmd_empty | rx_WR_enabled;
        assign chan_fifodata = dataout[rd_select];
        assign chan_usedw = usedw[rd_select];
-       assign debugbus = {4'd0, rxclk, debug, chan_usedw==0, rx_full[0], 
chan_empty[0]};
+       assign debugbus = {4'd0, rxclk, debug, store_next[3], store_next[1], 
store_next[0]};
                             
 
 endmodule

Modified: 
gnuradio/branches/developers/gnychis/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
===================================================================
--- 
gnuradio/branches/developers/gnychis/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
    2007-12-14 22:10:30 UTC (rev 7184)
+++ 
gnuradio/branches/developers/gnychis/inband/usrp/fpga/toplevel/usrp_inband_usb/config.vh
    2007-12-14 23:47:25 UTC (rev 7185)
@@ -31,10 +31,10 @@
 // ====================================================================
 
 // Uncomment this for 1 rx channel (w/ halfband) & 1 transmit channel
-//  `include "../include/common_config_1rxhb_1tx.vh"
+  `include "../include/common_config_1rxhb_1tx.vh"
 
 // Uncomment this for 2 rx channels (w/ halfband) & 2 transmit channels
-`include "../include/common_config_2rxhb_2tx.vh"
+//`include "../include/common_config_2rxhb_2tx.vh"
 
 // Uncomment this for 4 rx channels (w/o halfband) & 0 transmit channels
 //`include "../include/common_config_4rx_0tx.vh"





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