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[Commit-gnuradio] r7171 - usrp2/trunk/fpga/top/u2_sim


From: matt
Subject: [Commit-gnuradio] r7171 - usrp2/trunk/fpga/top/u2_sim
Date: Fri, 14 Dec 2007 01:22:26 -0700 (MST)

Author: matt
Date: 2007-12-14 01:22:26 -0700 (Fri, 14 Dec 2007)
New Revision: 7171

Modified:
   usrp2/trunk/fpga/top/u2_sim/u2_sim_top.v
Log:
invert sense of adc enables, and speed up sim by not turning on dump until the 
ram is loaded


Modified: usrp2/trunk/fpga/top/u2_sim/u2_sim_top.v
===================================================================
--- usrp2/trunk/fpga/top/u2_sim/u2_sim_top.v    2007-12-14 08:21:25 UTC (rev 
7170)
+++ usrp2/trunk/fpga/top/u2_sim/u2_sim_top.v    2007-12-14 08:22:26 UTC (rev 
7171)
@@ -69,13 +69,11 @@
    // ADC
    wire [13:0] adc_a;
    wire        adc_ovf_a;
-   wire        adc_oen_a;
-   wire        adc_pdn_a;
+   wire        adc_on_a,  adc_oe_a;
    
    wire [13:0] adc_b;
    wire        adc_ovf_b;
-   wire        adc_oen_b;
-   wire        adc_pdn_b;
+   wire        adc_on_b, adc_oe_b;
    
    // DAC
    wire [15:0] dac_a;
@@ -158,6 +156,8 @@
    always #1000000 $monitor("Time in ns ",$time);
    
    initial begin
+      @(negedge cpld_done);
+      @(posedge cpld_done);
       $dumpfile("u2_sim_top.lxt");
       $dumpvars(0,u2_sim_top);
    end
@@ -172,11 +172,11 @@
      (.ser_tx_clk(ser_tx_clk), .ser_tkmsb(ser_tkmsb), .ser_tklsb(ser_tklsb), 
.ser_t(ser_t),
       .ser_rx_clk(ser_rx_clk), .ser_rkmsb(ser_rkmsb), .ser_rklsb(ser_rklsb), 
.ser_r(ser_r),
       .even(0),.error(0) );
-   
+
    adc_model adc_model
      (.clk(dsp_clk),.rst(0),
-      
.adc_a(adc_a),.adc_ovf_a(adc_ovf_a),.adc_oen_a(adc_oen_a),.adc_pdn_a(adc_pdn_a),
-      
.adc_b(adc_b),.adc_ovf_b(adc_ovf_b),.adc_oen_b(adc_oen_b),.adc_pdn_b(adc_pdn_b));
+      
.adc_a(adc_a),.adc_ovf_a(adc_ovf_a),.adc_on_a(adc_on_a),.adc_oe_a(adc_oe_a),
+      
.adc_b(adc_b),.adc_ovf_b(adc_ovf_b),.adc_on_b(adc_on_b),.adc_oe_b(adc_oe_b) );
 
    wire [2:0] speed;
    Phy_sim phy_model
@@ -269,12 +269,12 @@
                     .cpld_detached     (cpld_detached),
                     .adc_a             (adc_a[13:0]),
                     .adc_ovf_a         (adc_ovf_a),
-                    .adc_oen_a         (adc_oen_a),
-                    .adc_pdn_a         (adc_pdn_a),
+                    .adc_on_a          (adc_on_a),
+                    .adc_oe_a          (adc_oe_a),
                     .adc_b             (adc_b[13:0]),
                     .adc_ovf_b         (adc_ovf_b),
-                    .adc_oen_b         (adc_oen_b),
-                    .adc_pdn_b         (adc_pdn_b),
+                    .adc_on_b          (adc_on_b),
+                    .adc_oe_b          (adc_oe_b),
                     .dac_a             (dac_a[15:0]),
                     .dac_b             (dac_b[15:0]),
                     .scl_pad_i         (scl_pad_i),





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