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Re: [avr-gcc-list] 32-bits time


From: David Kelly
Subject: Re: [avr-gcc-list] 32-bits time
Date: Wed, 12 Oct 2005 21:29:05 -0500


On Oct 12, 2005, at 3:22 PM, Eric Pasquier wrote:

//================================================
// timer32_now
// Retrieve the current time from the global clock in Timer1,
// disabling interrupts to avoid stomping on the TEMP register.
//------------------------------------------------
inline uint32_t timer32_now(void)
{
  int8_t    sreg;
  uint16_t  tempL, tempH;

  sreg=SREG;
  cli();
  tempL=TCNT1;
  tempH=hiword_time;
  SREG=sreg;

  return (((uint32_t)(tempH)<<16) + tempL);
}

As others have said with the prescaler set to 1 TCNT1 is running too fast. However I think below will not misbehave as badly as the above. Specifically the test for TOV1. The union/struct thing just makes things easier to read and write. Avr-gcc handles it very efficiently:

inline uint32_t timer32_now(void)
{
    int8_t sreg;
    union {
        struct {
            uint16_t lo, hi;
        } w;
        uint32_t l;
    } temp;

    sreg = SREG;
    cli();
    temp.w.lo = TCNT1;
    temp.w.hi = hiword_time;

    //  check for unserved Timer1 Overflow
    if( TIFR & (1<<TOV1) )
temp.w.hi++; // do what hasn't yet been done in SIG_OVERFLOW1

    SREG = sreg;

    return( temp.l );
}

One more thought is to make use of the temporary latch register associated with 16 bit registers such as TCNT1:

inline uint32_t timer32_now(void)
{
    int8_t sreg;
    union {
        struct {
            uint8_t lo, mid;
            uint16_t hi;
        } part;
        uint32_t l;
    } temp;

    sreg = SREG;

    temp.part.lo = TCNT1L;    //  TCNT1H is latched
    cli();                    //  disable IRQ
    temp.part.mid = TCNT1H;   //  fetch TCNT1H from the latch
    temp.part.hi = hiword_time;

    SREG = sreg;

    return( temp.l );
}

--
David Kelly N4HHE, address@hidden
========================================================================
Whom computers would destroy, they must first drive mad.





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